National Support for Project Reduced Certification Costs Using Trusted Multi-core Platforms

Czech title

Národní dofinancování projektu Reduced Certification Costs Using Trusted Multi-core Platforms

Type

grant

Keywords

multi-core platforms, certification

Abstract

The RECOMP (Reduced certification cost for trusted multi-core platforms) research project
will establish methods, tools and platforms for enabling cost-efficient certification and re-certification
of safety-critical systems and mixed-criticality systems, i.e. systems containing safety-critical and nonsafety-
critical components.
RECOMP recognizes the fact that the increasing processing power of embedded systems is mainly
provided by increasing the number of processing cores. The increased numbers of cores is commonly
regarded as a design challenge in the safety-critical area, as there are no established approaches to
achieve certification.
At the same time there is an increased need for flexibility in the products in the safety-critical market.
This need for flexibility puts new requirements on the customization and the upgradability of both the
non-safety and safety-critical critical part. The difficulty with this is the large cost in both effort and
money of the re-certification of the modified software, which means that companies cannot fully
leverage the advantages of modular software system.
RECOMP will provide reference designs and platform architectures together with the required design
methods and tools for achieving cost-effective certification and re-certification of mixed-criticality,
component based, multi-core systems. The aim of RECOMP is to define a European standard reference
technology for mixed-criticality multi-core systems supported by the European tool vendors
participating in RECOMP.
The RECOMP project will bring clear benefits in terms of cross-domain implementations of mixedcriticality
systems in all domains addressed by project participants: automotive systems, aerospace
systems, industrial control systems, lifts and transportation systems.
RECOMP will thus provide solutions that will allow European industry to increase its market share in
the growing market of mixed-criticality systems.

Publications

2013

STRAKA, M.; KAŠTIL, J.; KOTÁSEK, Z.; MIČULKA, L. Fault Tolerant System Design and SEU Injection based Testing. Microprocessors and Microsystems, 2013, vol. 2013, no. 37, p. 155-173. ISSN: 0141-9331. Detail
STRNADEL, J. Load-Adaptive Monitor-Driven Hardware for Preventing Embedded Real-Time Systems from Overloads Caused by Excessive Interrupt Rates. Architecture of Computing Systems - ARCS 2013. Lecture Notes in Computer Science. Lecture Notes in Computer Science, ISSN 0302-9743, Vol. 7767. Berlin: Springer Verlag, 2013. p. 98-109. ISBN: 978-3-642-36423-5. ISSN: 0302-9743. Detail
STRNADEL, J. On Design of Priority-Driven Load-Adaptive Monitoring-Based Hardware for Managing Interrupts in Embedded Event-Triggered Real-Time Systems. Proceedings of the IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Brno: IEEE Computer Society, 2013. p. 24-29. ISBN: 978-1-4673-6133-0. Detail

2012

DITTRICH, P. Identification of Flight Parameters of Light Sport Aircraft. Proceedings of the 18th Conference STUDENT EEICT 2012. Volume 3. Brno: Brno University of Technology, 2012. p. 464-468. ISBN: 978-80-214-4462-1. Detail
JURÁNEK, R.; HRADIŠ, M.; ZEMČÍK, P. Real-time Algorithms of Object Detection with Classifiers. In Real-Time System. Rijeka: InTech - Open Access Publisher, 2012. p. 1-22. ISBN: 9789535105107. Detail
KAŠTIL, J.; STRAKA, M.; MIČULKA, L.; KOTÁSEK, Z. Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA. 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. Cesme-Izmir: IEEE Computer Society, 2012. p. 250-257. ISBN: 978-0-7695-4798-5. Detail
MIČULKA, L.; KOTÁSEK, Z. Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System. 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. Cesme-Izmir: IEEE Computer Society, 2012. p. 20-21. ISBN: 978-3-902457-33-2. Detail
STRAKA, M.; KAŠTIL, J.; KOTÁSEK, Z. Methodology for Reliability Analysis of FPGA-based Fault Tolerant Systems. CSE'2012 International Scientific Conference on Computer Science and Engineering. Košice: The University of Technology Košice, 2012. p. 146-153. ISBN: 978-80-8143-049-7. Detail
STRAKA, M.; MIČULKA, L.; KAŠTIL, J.; KOTÁSEK, Z. Test Platform for Fault Tolerant Systems Design Qualities Verification. 15th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Tallin: IEEE Computer Society, 2012. p. 336-341. ISBN: 978-1-4673-1185-4. Detail
STRNADEL, J. Monitoring-Driven HW/SW Interrupt Overload Prevention for Embedded Real-Time Systems. In Proceedings of the 15th International IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). Tallin: IEEE Computer Society, 2012. p. 121-126. ISBN: 978-1-4673-1188-5. Detail
ZACHARIÁŠOVÁ, M.; LENGÁL, O.; KAJAN, M. HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware. Lecture Notes in Computer Science, 2012, vol. 2012, no. 7261, p. 247-253. ISSN: 0302-9743. Detail

2011

DITTRICH, P.; CHUDÝ, P. Application of Kalman Filter to oversampled data from Global Position System. ElectroScope - http://www.electroscope.zcu.cz, 2011, vol. 2011, no. 2, p. 0-0. ISSN: 1802-4564. Detail
STRNADEL, J. Concept of Adaptive Embedded HW/SW Architecture for Dynamic Prevention from Interrupt Overloads. Proceedings of the Work in Progress Session held in connection with SEAA 2011, the 37th EUROMICRO Conference on Software Engineering and Advanced Applications and DSD 2011, the 14th EUROMICRO Conference on Digital System Design. Oulu: Johannes Kepler University Linz, 2011. p. 21-22. ISBN: 978-3-902457-30-1. Detail
ZEMČÍK, P.; MARŠÍK, L.; ŠIROKÝ, V.; FUČÍK, O.; KORČEK, P.; ŠUSTEK, J. AX32 Low Power Embedded Video Enabled System Using FPGA. Proceedings of the 21th Conference on Field Programmable Logic and Applications Workshop. Chania: Institute of Electrical and Electronics Engineers, 2011. p. 1-2. ISBN: 978-0-7695-4529-5. Detail