Publikace
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2024
LOJDA, J.; STRNADEL, J.; ŠIMEK, V.; SMRŽ, P.; HAYES, M.; POPP, R. The LoLiPoP-IoT Project: Long Life Power Platforms for Internet of Things. Paris: Institute of Electrical and Electronics Engineers, 2024.
p. 0-0. DetailSTRNADEL, J.; LOJDA, J.; SMRŽ, P.; ŠIMEK, V. On SMC-Based Dependability Analysis in LoLiPoP-IoT Project. Limenas Hersonissou: 2024.
p. 0-0. Detail -
2023
LOJDA, J.; PÁNEK, R.; SEKANINA, L.; KOTÁSEK, Z. Automated Design and Usage of the Fault-Tolerant Dynamic Partial Reconfiguration Controller for FPGAs. Microelectronics Reliability, 2023, vol. 2023, no. 144,
p. 1-16. ISSN: 0026-2714. DetailPÁNEK, R.; LOJDA, J. The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration Controller. In LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings. Quito: Institute of Electrical and Electronics Engineers, 2023.
p. 104-107. ISBN: 978-1-6654-5705-7. Detail -
2021
LOJDA, J.; PÁNEK, R.; KOTÁSEK, Z. Automatic Design of Fault-Tolerant Systems for VHDL and SRAM-based FPGAs. In Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021. Palermo: Institute of Electrical and Electronics Engineers, 2021.
p. 549-552. ISBN: 978-1-6654-2703-6. DetailLOJDA, J.; PÁNEK, R.; KOTÁSEK, Z. Automatically-Designed Fault-Tolerant Systems: Failed Partitions Recovery. In 2021 IEEE East-West Design and Test Symposium, EWDTS 2021 - Proceedings. Batumi: Institute of Electrical and Electronics Engineers, 2021.
p. 26-33. ISBN: 978-1-6654-4503-0. DetailLOJDA, J.; PÁNEK, R.; PODIVÍNSKÝ, J.; ČEKAN, O.; KRČMA, M.; KOTÁSEK, Z. Testing Embedded Software Through Fault Injection: Case Study on Smart Lock. In 2021 IEEE 22nd Latin American Test Symposium, LATS 2021. Punta del Este: Institute of Electrical and Electronics Engineers, 2021.
p. 80-85. ISBN: 978-1-6654-2057-0. DetailLOJDA, J.; PODIVÍNSKÝ, J.; ČEKAN, O.; KOTÁSEK, Z. Accelerating Tests of Arithmetic Circuits Through On-FPGA Stimuli Generation and Their Reduction. In International Conference on Electrical, Computer, Communications and Mechatronics Engineering, ICECCME 2021. Mauritius: Institute of Electrical and Electronics Engineers, 2021.
p. 1628-1633. ISBN: 978-1-6654-1262-9. DetailPÁNEK, R.; LOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Reliability Analysis of the FPGA Control System with Reconfiguration Hardening. In Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021. Palermo: Institute of Electrical and Electronics Engineers, 2021.
p. 553-556. ISBN: 978-1-6654-2703-6. Detail -
2020
LOJDA, J.; PÁNEK, R.; PODIVÍNSKÝ, J.; ČEKAN, O.; KRČMA, M.; KOTÁSEK, Z. Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock. In 2020 IEEE East-West Design and Test Symposium, EWDTS 2020 - Proceedings. Varna: Institute of Electrical and Electronics Engineers, 2020.
p. 24-28. ISBN: 978-1-7281-9899-6. DetailLOJDA, J.; PÁNEK, R.; PODIVÍNSKÝ, J.; ČEKAN, O.; KRČMA, M.; KOTÁSEK, Z. Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. In Proceedings - Euromicro Conference on Digital System Design, DSD 2020. Kranj: Institute of Electrical and Electronics Engineers, 2020.
p. 680-683. ISBN: 978-1-7281-9535-3. DetailLOJDA, J.; PODIVÍNSKÝ, J.; ČEKAN, O.; PÁNEK, R.; KRČMA, M.; KOTÁSEK, Z. Automatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem. In Proceedings - 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020. Novi Sad: Institute of Electrical and Electronics Engineers, 2020.
p. 1-4. ISBN: 978-1-7281-9938-2. DetailPÁNEK, R.; LOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Reliability Analysis of Reconfiguration Controller for FPGA-Based Fault Tolerant Systems: Case Study. In 2020 International Symposium on VLSI Design, Automation, and Test (VLSI-DAT) : proceedings of technical papers. Hsinchu: IEEE Computer Society, 2020.
p. 121-124. ISBN: 978-1-7281-6083-2. DetailPODIVÍNSKÝ, J.; LOJDA, J.; PÁNEK, R.; ČEKAN, O.; KRČMA, M.; KOTÁSEK, Z. Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks. In 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). San José: IEEE Circuits and Systems Society, 2020.
p. 1-4. ISBN: 978-1-7281-3427-7. Detail -
2019
ČEKAN, O.; PODIVÍNSKÝ, J.; LOJDA, J.; PÁNEK, R.; KRČMA, M.; KOTÁSEK, Z. Smart Electronic Locks and Their Reliability. Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: Czech Technical University, 2019.
p. 4-5. ISBN: 978-80-01-06607-2. DetailČEKAN, O.; PODIVÍNSKÝ, J.; LOJDA, J.; PÁNEK, R.; KRČMA, M.; KOTÁSEK, Z. Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards. In Proceedings of the 2019 22nd Euromicro Conference on Digital System Design. Kalithea: Institute of Electrical and Electronics Engineers, 2019.
p. 506-513. ISBN: 978-1-7281-2861-0. DetailKRČMA, M.; KOTÁSEK, Z.; LOJDA, J. Detecting hard synapses faults in artificial neural networks. In 20th IEEE Latin American Test Symposium (LATS 2019). Santiago de Chile: IEEE Computer Society, 2019.
p. 1-6. ISBN: 978-1-7281-1756-0. DetailLOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems. In 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019.
p. 93-96. ISBN: 978-1-7281-1756-0. DetailPODIVÍNSKÝ, J.; LOJDA, J.; KOTÁSEK, Z. Extended Reliability Analysis of Fault-Tolerant FPGA-based Robot Controller. In 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019.
p. 97-100. ISBN: 978-1-7281-1756-0. Detail -
2018
LOJDA, J.; KOTÁSEK, Z. Automatizace návrhu spolehlivých systémů a její dílčí komponenty. Počítačové architektury & diagnostika 2018. Stachy: Západočeská univerzita v Plzni, 2018.
s. 5-8. ISBN: 978-80-261-0814-6. DetailLOJDA, J.; KOTÁSEK, Z. Fault Tolerance in HLS for the Purposes of Reliable System Design Automation. Proceedings of the 6th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2018.
p. 31-32. ISBN: 978-80-01-06456-6. DetailLOJDA, J.; PODIVÍNSKÝ, J.; ČEKAN, O.; PÁNEK, R.; KOTÁSEK, Z. FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant Systems Design Automation. In Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018.
p. 244-251. ISBN: 978-1-5386-7376-8. DetailLOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Fault Tolerance Properties of Systems Generated with the Use of High-Level Synthesis. In Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018.
p. 80-86. ISBN: 978-1-5386-5710-2. DetailLOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z.; KRČMA, M. Majority Type and Redundancy Level Influences on Redundant Data Types Approach for HLS. In 2018 16th Biennial Baltic Electronics Conference (BEC). Tallinn: IEEE Computer Society, 2018.
p. 1-4. ISBN: 978-1-5386-7312-6. DetailPÁNEK, R.; LOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Partial Dynamic Reconfiguration in an FPGA-based Fault-Tolerant System: Simulation-based Evaluation. In Proceedings of IEEE East-West Design & Test Symposium. Kazaň: IEEE Computer Society, 2018.
p. 129-134. ISBN: 978-1-5386-5710-2. DetailPODIVÍNSKÝ, J.; LOJDA, J.; ČEKAN, O.; KOTÁSEK, Z. Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-based Experimental Robot Controller. In Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018.
p. 229-236. ISBN: 978-1-5386-7376-8. DetailPODIVÍNSKÝ, J.; LOJDA, J.; KOTÁSEK, Z. FPGA-based Robot Controller: An Experimental Evaluation of Fault Tolerance Properties. INFORMAL PROCEEDINGS 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Budapešť: 2018.
p. 9-12. DetailPODIVÍNSKÝ, J.; LOJDA, J.; KOTÁSEK, Z. An Experimental Evaluation of Fault-Tolerant FPGA-based Robot Controller. In Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018.
p. 63-69. ISBN: 978-1-5386-5710-2. Detail -
2017
KRČMA, M.; KOTÁSEK, Z.; LOJDA, J. Comparison of FPNNs Models Approximation Capabilities and FPGA Resources Utilization. In Proceedings of IEEE 13th International Conference on Intelligent Computer Communication and Processing. Cluj-Nappoca: IEEE Computer Society, 2017.
p. 125-132. ISBN: 978-1-5386-3368-7. DetailKRČMA, M.; LOJDA, J.; KOTÁSEK, Z. Triple Modular Redundancy Used in Field Programmable Neural Networks. In Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017.
p. 1-6. ISBN: 978-1-5386-3299-4. DetailLOJDA, J.; KOTÁSEK, Z. A Basic Approach to Fault Tolerance of Data Paths of HLS-synthesized Systems and its Evaluation. Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017.
p. 79-80. ISBN: 978-80-01-06178-7. DetailLOJDA, J.; KOTÁSEK, Z. Automatizace návrhu systémů odolných proti poruchám pomocí vysokoúrovňové syntézy. Počítačové architektury & diagnostika 2017. Smolenice: Slovenská technická univerzita v Bratislavě, 2017.
s. 59-62. ISBN: 978-80-972784-0-3. DetailLOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Redundant Data Types and Operations in HLS and their Use for a Robot Controller Unit Fault Tolerance Evaluation. In Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017.
p. 359-364. ISBN: 978-1-5386-3299-4. DetailLOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z.; KRČMA, M. Data Types and Operations Modifications: a Practical Approach to Fault Tolerance in HLS. In Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017.
p. 273-278. ISBN: 978-1-5386-3299-4. DetailPODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; ZACHARIÁŠOVÁ, M.; KRČMA, M.; KOTÁSEK, Z. Functional Verification Based Platform for Evaluating Fault Tolerance Properties. Microprocessors and Microsystems, 2017, vol. 52, no. 5,
p. 145-159. ISSN: 0141-9331. DetailPODIVÍNSKÝ, J.; LOJDA, J.; ČEKAN, O.; PÁNEK, R.; KOTÁSEK, Z. Reliability Analysis and Improvement of FPGA-based Robot Controller. In Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Vídeň: IEEE Computer Society, 2017.
p. 337-344. ISBN: 978-1-5386-2145-5. Detail -
2016
KRČMA, M.; KOTÁSEK, Z.; LOJDA, J. Implementation of Fault Tolerant Techniques into FPNNs. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016.
p. 297-298. ISBN: 978-1-5090-5602-6. DetailKRČMA, M.; KOTÁSEK, Z.; LOJDA, J.; KAŠTIL, J. Comparsion of FPNNs models approximation capabilities and resources utilization. Proceedings of the Work in progress Session held in connection with DSD 2016. Limassol: Johannes Kepler University Linz, 2016.
p. 1-2. ISBN: 978-3-902457-46-2. DetailLOJDA, J.; KOTÁSEK, Z. A Systematic Approach to the Description of Fault-tolerant Systems. Proceedings of the 4th Prague Embedded Systems Workshop. Roztoky u Prahy: 2016.
p. 0-0. DetailLOJDA, J.; PODIVÍNSKÝ, J.; KRČMA, M.; KOTÁSEK, Z. HLS-based Fault Tolerance Approach for SRAM-based FPGAs. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016.
p. 301-302. ISBN: 978-1-5090-5602-6. DetailPODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; KOTÁSEK, Z. Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016.
p. 293-294. ISBN: 978-1-5090-5602-6. DetailPODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; KOTÁSEK, Z. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. In Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016.
p. 487-494. ISBN: 978-1-5090-2816-0. Detail