Publication Details

Evolutionary Design of Polymorphic Gates Using Ambipolar Transistors

NEVORAL, J.; RŮŽIČKA, R.; MRÁZEK, V. Evolutionary Design of Polymorphic Gates Using Ambipolar Transistors. In 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016. p. 1-8. ISBN: 978-1-5090-4240-1.
Czech title
Evoluční návrh polymorfních hradel pomocí ambipolárních tranzistorů
Type
conference paper
Language
English
Authors
URL
Keywords

Polymorphic electronics, polymorphic gate, ambipolar transistor, digital circuit, logic gate, evolutionary design, CGP

Abstract

The objective of the paper is to introduce a new approach to the evolutionary design of polymorphic digital circuits conducted directly at transistor level. A discrete eventdriven simulator was utilized to achieve reasonable trade-off between performance and precision. The proposed approach was evaluated on a set of polymorphic logic circuits controlled by switching the power rails. It was demonstrated that the proposed method is able to produce valid solutions. A lot of polymorphic gates based on ambipolar transistors were designed, which provide transistor savings compared to existing circuits. A new class of polymorphic gates was discovered thanks to the proposed system - gates based on conventional MOS transistors whose functions are changed by switching the power rails. They seem to have the best parameters among currently known polymorphic gates based on conventional transistors.

Published
2016
Pages
1–8
Proceedings
2016 IEEE Symposium Series on Computational Intelligence
ISBN
978-1-5090-4240-1
Publisher
Institute of Electrical and Electronics Engineers
Place
Athens
DOI
UT WoS
000400488302083
EID Scopus
BibTeX
@inproceedings{BUT131009,
  author="Jan {Nevoral} and Richard {Růžička} and Vojtěch {Mrázek}",
  title="Evolutionary Design of Polymorphic Gates Using Ambipolar Transistors",
  booktitle="2016 IEEE Symposium Series on Computational Intelligence",
  year="2016",
  pages="1--8",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Athens",
  doi="10.1109/SSCI.2016.7850177",
  isbn="978-1-5090-4240-1",
  url="http://ieeexplore.ieee.org/document/7850177/"
}
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