Automated Analysis and Verification Research Group - VeriFIT
https://verifit.webnode.cz/
Products
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2024
Mata: A Finite Automata Library, software, 2024
Authors: HAVLENA, V.; HOLÍK, L.; CHOCHOLATÝ, D.; LENGÁL, O.; SÍČ, J.; FIEDOR, T.; HRUŠKA, M.Predator Hunting Party: A Tool for Verification and Bug Hunting, version 3.1415, software, 2024
Authors: MÜLLER, P.; PERINGER, P.; ŠOKOVÁ, V.; VOJNAR, T.; KINŠT, O.; KOTOUN, M.Z3-Noodler: A String Solver, software, 2024
Authors: HAVLENA, V.; HOLÍK, L.; CHOCHOLATÝ, D.; LENGÁL, O.; SÍČ, J.; CHEN, Y. -
2023
Network application tester based on fault-injection, software, 2023
Authors: ROZSÍVAL, M.; SMRČKA, A.RacerF, Version 1.0, software, 2023
Authors: DACÍK, T.; VOJNAR, T. -
2022
Analyser of Metrics Measured in Monitoring Center, software, 2022
Authors: FIEDOR, T.; HRUŠKA, M.; SMRČKA, A.; ŠVÉDA, M.; HRADSKÝ, T.Atomer: Atomicity Violations Analyser, Version 2.0, software, 2022
Authors: HARMIM, D.; VOJNAR, T.Broom: A Static Analyzer for C Based on Separation Logic and the Principle of Bi-Abductive Reasoning, software, 2022
Authors: ROGALEWICZ, A.; ŠOKOVÁ, V.; VOJNAR, T.; HOLÍK, L.; PERINGER, P.; ZULEGER, F.GadgetCA: A Tool for Generating ReDoS Attacks, software, 2022
Authors: HOLÍK, L.; HOLÍKOVÁ, L.; HOMOLIAK, I.; LENGÁL, O.; VOJNAR, T.; VEANES, M.Multitenant Application Module of a Manufacturing Execution System, software, 2022
Authors: SMRČKA, A.; FREYBURG, P.; ŠVÉDA, M.; HRADSKÝ, T.Ranker: A Tool for Complementing Büchi Automata, software, 2022
Authors: HAVLENA, V.; LENGÁL, O.; ŠMAHLÍKOVÁ, B.Unite: An Adapter for Transforming Analysis Tools to Web Services via OSLC, Version 3.0, software, 2022
Authors: VAŠÍČEK, O.; FIEDOR, J.; SMRČKA, A.; VOJNAR, T.; KŘENA, B. -
2021
DeadlockF, Version 1.0, software, 2021
Authors: DACÍK, T.; VOJNAR, T.Software for measurement and evaluation of performance parameters, software, 2021
Authors: FIEDOR, T.; HRUŠKA, M.; SMRČKA, A.Testos-Aufover - Verification as a Service, software, 2021
Authors: SMRČKA, A.; VAŠÍČEK, O.; FIEDOR, J.; VOJNAR, T. -
2020
A Tool for Creating Test Scenarios for Industry Applications, software, 2020
Authors: HRUŠKA, M.; FIEDOR, T.; PANOV, S.; ROZSÍVAL, M.; SMRČKA, A.; TUREČEK, D.; POSPÍŠIL, L.; ČELEDA, P.ANaConDA: A Framework for Analysing Multi-threaded C/C++ Programs on the Binary Level, Version 0.4, software, 2020
Authors: FIEDOR, J.; VAŠÍČEK, O.; MUŽIKOVSKÁ, M.; SMRČKA, A.; VOJNAR, T.; KŘENA, B.Atomer: Atomicity Violations Analyser, Version 1.0, software, 2020
Authors: HARMIM, D.; VOJNAR, T.Chipmunk: A Tool for Matching of Regular Expressions., software, 2020
Authors: HOLÍK, L.; HOLÍKOVÁ, L.; LENGÁL, O.; VOJNAR, T.; VEANES, M.L2D2: A Low Level Deadlock Detector, Version 1.0, software, 2020
Authors: MARCIN, V.; VOJNAR, T.Looper: A Worst Case Cost Analyser, Version 1.0, software, 2020
Authors: PAVELA, O.; VOJNAR, T.; FIEDOR, T.; ROGALEWICZ, A.OSLC ANaConDA Adapter, Version 1.0, software, 2020
Authors: VAŠÍČEK, O.; FIEDOR, J.; SMRČKA, A.; VOJNAR, T.; KŘENA, B.Perun: Lightweight Performance Version System, Version 0.18.3, software, 2020
Authors: FIEDOR, T.; PAVELA, J.; PODOLA, R.; STUPINSKÝ, Š.; LIŠČINSKÝ, M.; ROGALEWICZ, A.; VOJNAR, T.Testos-Spectra: A tool for verification of ptLTL on C/C++ programs, software, 2020
Authors: SMRČKA, A.; SEČKAŘOVÁ, P. -
2019
PICoSo: An SMT Solver for String Constraints, software, 2019
Authors: HOLÍKOVÁ, L.; JANKŮ, P.Trau: SMT solver for string constraints, software, 2019
Authors: HOLÍK, L.; ABDULLA, P.; ATIG, M.; BUI PHI, D.; CHEN, Y.; REZINE, A.; RUMMER, P.VeriFIT Static Analysis Plugins, software, 2019
Authors: MARCIN, V.; HARMIM, D.; PAVELA, O.; VOJNAR, T.; FIEDOR, T.; ROGALEWICZ, A. -
2018
MINA: A Tool for Verification of Programs with an Unbounded Number of Threads, software, 2018
Authors: HOLÍK, L.; HOLÍKOVÁ, L.; VOJNAR, T.Ranger: A Tool for Bounds Analysis of Heap-Manipulating Programs, software, 2018
Authors: FIEDOR, T.; HOLÍK, L.; ROGALEWICZ, A.; VOJNAR, T.; SINN, M.; ZULEGER, F.Sloth: An SMT Solver for String Constraints, software, 2018
Authors: HOLÍK, L.; JANKŮ, P.; VOJNAR, T.; LIN, A.; RUMMER, P. -
2017
Gaston - Symbolic WS1S Solver, software, 2017
Authors: FIEDOR, T.; HOLÍK, L.; JANKŮ, P.; LENGÁL, O.; VOJNAR, T. -
2015
dWiNA - An Implementation of Decision Procedure for WS1S, software, 2015
Authors: FIEDOR, T.; LENGÁL, O.; HOLÍK, L.; VOJNAR, T.INCLUDER (tracer): Trace Inclusion for Data Word Automata, software, 2015
Authors: ROGALEWICZ, A.; IOSIF, R.; VOJNAR, T.Norn: An SMT Solver for String Constraints, software, 2015
Authors: HOLÍK, L.; ABDULLA, P.; ATIG, M.; CHEN, Y.; REZINE, A.; STENMAN, J. -
2014
HADES (Hazard Detection System), software, 2014
Authors: CHARVÁT, L.; SMRČKA, A.; VOJNAR, T.SLIDE: Separation Logic with Inductive Definitions, software, 2014
Authors: ROGALEWICZ, A.; IOSIF, R.; VOJNAR, T.SPEN - A Solver for Separation Logic Entailments, software, 2014
Authors: LENGÁL, O.; VOJNAR, T.; ENEA, C.; SIGHIREANU, M. -
2013
CPAlien: Configurable Program Analysis over Symbolic Memory Graphs, software, 2013
Authors: MÜLLER, P.; VOJNAR, T. -
2012
ANaConDA: A Framework for Analysing Multi-threaded C/C++ Programs on the Binary Level, software, 2012
Authors: FIEDOR, J.; VOJNAR, T.HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware, software, 2012
Authors: ZACHARIÁŠOVÁ, M.; LENGÁL, O.; KAJAN, M.VATA: A Library for Efficient Manipulation of Non-Deterministic Tree Automata, software, 2012
Authors: LENGÁL, O.; ŠIMÁČEK, J.; VOJNAR, T. -
2011
A Tool Chain Combining Dynamic Analysis and Bounded Model Checking, software, 2011
Authors: DUDKA, V.; FIEDOR, J.; VOJNAR, T.; KŘENA, B. -
2010
An Easy to Use Infrastructure for Building Static Analysis Tools, software, 2010
Authors: DUDKA, K.; PERINGER, P.; VOJNAR, T.Forester: A Tool for Verification of Programs with Pointers, software, 2010
Authors: ŠIMÁČEK, J.; HOLÍK, L.; ROGALEWICZ, A.; VOJNAR, T.; HABERMEHL, P.Framework for Formal Verification of Clock Domain Crossing, software, 2010
Authors: SMRČKA, A.; VOJNAR, T.libSFTA: A Semi-symbolic Nondeterministic Finite Tree Automata Library Prototype, software, 2010
Authors: LENGÁL, O.; HOLÍK, L.; VOJNAR, T.Predator: A Tool for Checking Manipulation of Dynamic Data Structures Using Separation Logic, software, 2010
Authors: DUDKA, K.; PERINGER, P.; VOJNAR, T.Replay Tracer & BMC, software, 2010
Authors: DUDKA, V.; FIEDOR, J.; KŘENA, B.; LETKO, Z.; VOJNAR, T.Search-based Testing Environment (SearchBestie), software, 2010
Authors: LETKO, Z.; VOJNAR, T.; KŘENA, B.Tool for verification of systems described using the Modechart formalism, software, 2010
Authors: GACH, M.; FIEDOR, J.; ČEŠKA, M.Tool for verification of systems specified in RT-Logic language, software, 2010
Authors: FIEDOR, J.; GACH, M.; ČEŠKA, M. -
2009
Clock Domain Crossing Analyzer, software, 2009
Authors: SMRČKA, A.FAST to ARMC Translator, software, 2009
Authors: SMRČKA, A.FLATA, software, 2009
Authors: KONEČNÝ, F.; VOJNAR, T.; BOZGA, M.; IOSIF, R.Tool for Computing Simulations, software, 2009
Authors: ŠIMÁČEK, J.; HOLÍK, L.; VOJNAR, T. -
2008
Java Atomicity Violation Detector & Healer, software, 2008
Authors: LETKO, Z.; VOJNAR, T.; KŘENA, B.Model checking Using Symbolic Execution, software, 2008
Authors: KŘENA, B.; BRAIONE, P.; DENARO, G.; PEZZE, M. -
2007
ARTMC - Abstract Regular Tree Model Checking, software, 2007
Authors: ROGALEWICZ, A.; VOJNAR, T.Java Race Detector & Healer, software, 2007
Authors: LETKO, Z.; VOJNAR, T.; KŘENA, B.Translator of VHDL Design to Counter Automaton, software, 2007
Authors: SMRČKA, A.; VOJNAR, T.