Product Details
Analyzátor CDC asynchronních komponent
Created: 2009
CDC, synchronization analysis, CDC verification
A tool for extending SMV based models of hardware designs of component controlled with multiple clocks. Conventional technique of hardware design formal verification is based on modelling zero-delay changes of signal value. Unfortunatelly, this type of abstraction hides the problem of clock domain crossings (CDCs) which cause is either in metastability or in bad synchronization protocol design. CDCreveal tool implements the detection and extension of parts of CDCs prone to synchronization bugs, so one can easily detect and examine clock domain crossing or automatically verify the synchronization protocol using model checker.
Free software under the terms of GNU GPL (cf. http://www.gnu.org/licenses/gpl.html).
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, 2007-2013, running