Course details

Personal Computers

ITP Acad. year 2025/2026 Summer semester 4 credits

Current academic year

Course is not open in this year

The course will provide students with up-to-date information on personal computer technique. Students will acquire the information on the principles of personal computer structure, I/O buses, elementary principles of external adapter construction and buses for the communication with peripheral devices.

Guarantor

Course coordinator

Language of instruction

Czech, English

Completion

Examination (written)

Time span

  • 26 hrs lectures
  • 16 hrs laboratories

Assessment points

  • 60 pts final exam
  • 24 pts mid-term test
  • 16 pts labs

Department

Learning objectives

To provide students with the information on personal computer structure, parameters, its component structure and trends for the future.
Students will become acquainted with the principles of PC construction and certain typical peripheral devices construction. In laboratory tutorials, the attention will be paid especially to the principles of peripheral device control.

Recommended prerequisites

Study literature

Syllabus of lectures

  1. The Development Stages of Personal Computers, Parameters, Concepts.
  2. The Development Stages of Intel Microprocessor Architectures.
  3. Scalar and Superscalar Architectures.  
  4. The Implementation of CISC and RISC Architectures in Intel Microprocessors - 1. 
  5. The Implementation of CISC and RISC Architectures in Intel Microprocessors - 2.
  6. Memory Organization, Elements, Technologies, Memory Addressing, I/O Ports Addressing. CMOS Memory.
  7. Memory Organization, Elements, Technologies, Memory Addressing, I/O Ports Addressing. CMOS Memory. 
  8. Cache Memory, its Organization and Implementation.
  9. The Principles of Peripheral Operations Control, PIO Modes, Interrupt Request, Direct Memory Access.
  10. The Development Stages of Personal Computer Buses.
  11. Centronics, Its Structure and Communication.
  12. The Principles of Personal Computer Adapter Design and Construction.
  13. The Buses for Peripheral Devices Control.

Syllabus of laboratory exercises

  • Communication on ISA bus and the use of BootROM.
  • PC Power Consumption. 
  • VGA interface, signals analysis.  
  • HDD and S.M.A.R.T. technology.
  • Communication on ISA bus and servicing the IRQ.
  • PCI System Bus and the address decoder.
  • VGA interface, FITkit platform.
  • PS/2 analysis.  

Progress assessment

  • Lab tutorials: 16 points.
  • Written mid-term written exam: 24 points.
  • Minimum semestral activity score is not specified.
  • Final written exam: 60 points.


Attending lab experiments, mid-term exam passing. Laboratories will be possible to be passed during the following weeks.

Course inclusion in study plans

  • Programme BIT, 2nd year of study, Elective
  • Programme BIT (in English), 2nd year of study, Elective
Back to top