Course details
Hardware/Software Codesign (in English)
HSCe Acad. year 2021/2022 Winter semester 5 credits
The course focuses on aspects of system level design. Implementation of HW/SW systems optimized according to various criteria. Behavioural and structural HW/SW system description. Basic hardware and software components and interface models. Hardware and software components synthesis. Assignment of behavioural description to given components. Design of interfaces between HW/SW components. Planning access to distributed components. Prediction and design analysis techniques regarding given constrains. HW/SW partitioning algorithms and tools. Heterogeneous computation architectures and platforms. Integrated design tools. Case studies of optimized HW/SW systems.
Guarantor
Course coordinator
Language of instruction
Completion
Time span
- 39 hrs lectures
- 13 hrs projects
Assessment points
- 55 pts final exam
- 20 pts mid-term test
- 25 pts projects
Department
Lecturer
Instructor
Subject specific learning outcomes and competences
Students will gain knowledge and skill in theory and techniques of automatized HW/SW co-design of computation systems optimized according to various criteria.
Theoretical background for analysis and design of HW/SW systems.
Learning objectives
The aim of the course is to gain knowledge and skills in HW/SW co-design of computing systems. The students will also learn about models of hardware and software component behavior and mutual interaction, hardware and software partitioning algorithms and techniques and assessment of the quality, and the final system synthesis and optimization according to various criteria.
Prerequisite knowledge and skills
Basics of system simulation and design.
Study literature
- Lecture notes in e-format.
Fundamental literature
-
Schaumont, P. R.: A Practical Introduction to Hardware/Software Codesign, Second Edition, Springer, 2013, ISBN 978-1-4614-3737-6 (eBook).
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De Micheli, G., Rolf, E., Wolf, W.: Readings in Hardware/Software Co-design, Morgan Kaufmann; 1. vydání, 2001, 697 s., ISBN: 1558607021.
- L. H. Crockett, R. A. Elliot, M. A. Enderwitz and R. W. Stewart: The Zynq Book: Embedded Processing with the ARM CortexA9 on the Xilinx Zynq-7000 All Programmable SoC, First Edition, Strathclyde Academic Media, 2014.
- D. D. Gajski, N. D. Dutt, A. C-H Wu, S. Y-L Lin: High-Level Synthesis: Introduction to Chip and System Design, Springer, 1992, ISBN-13: 978-0792391944.
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M. Fingeroff: High-Level Synthesis Blue Book, Xlibris US, 2010, ISBN 1450097243.
Syllabus of lectures
- System-level design methodology for embedded systems.
- Heterogeneous computation structures, architectures and platforms.
- Behavioral and structural HW/SW system description.
- System-level synthesis - allocation, binding and scheduling.
- HW structures synthesis and optimization.
- CAD tools for HW/SW codesign.
- Languages for HW/SW system description.
- Design estimation and analysis techniques.
- Low-power design techniques.
- Models of computation.
- Inter-component interfaces and communication.
- Partitioning algorithms and tools.
- System-level optimization.
Syllabus - others, projects and individual work of students
Individual thirteen-hour project.
Progress assessment
Project (25 points) mid exam (20 points) final exam (55 points)
Controlled instruction
Exam prerequisites
For receiving the credit and thus for entering the exam, students have to obtain at least five points from the project. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action may be initiated.
Course inclusion in study plans
- Programme IT-MGR-2 (in English), field MGMe, 1st year of study, Compulsory