Podpora návrhu pro snadnou testovatelnost číslicových obvodů popsaných na úrovni meziregistrových přenosů

Design for Testability, Digital Circuits Diagnostics, Register Transfer Level

A complete formal approach to the RT level digital circuits diagnostics is presneted. To develop the methodology, formal tools were used. It allows to create a formal model of a circuit, to describe its diagnostic and testability properties and describe testability analysis algorithms, all of them formally. The concepts utilized in discrete mathematics and computer science are used. The entities which are objects of the circuit (circuit elements, interconnections, etc.) are subdivided into sets, other features and dependencies are expressed by relations. As the description language, the language of predicate logic is used. The exactness of the description and ability to transform problems of the testability analysis to well-known and solved problems of discrete mathematics and theoretical computer science are the main advantages of the formal approach.