Publication Details

Imaging Algorithm Speedup Using Co-Design

ZEMČÍK, P.; FUČÍK, O.; RICHTER, M.; VALENTA, P. Imaging Algorithm Speedup Using Co-Design. Summaries Volume Process Control 01. Štrbské Pleso: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2001. p. 96-97. ISBN: 80-227-1542-5.

Czech title

Urychlení algoritmů rastrového obrazu pomocí co-designu

Type

conference paper

Language

English

Authors

Zemčík Pavel, prof. Dr. Ing., dr. h. c. (DCGM)
Fučík Otto, doc. Dr. Ing. (DCSY)
Richter Miloslav, Ing., Ph.D. (UAMT)
Valenta Pavel, Ing.

Keywords

co-design, image processing, FPGA

Abstract

The contribution shows a possibility to speed up image processing algorithms using a suitable combination of DSP and FPGA and also demonstrates methods to distribute the computational tasks between the DSP and FPGA.

Published

2001

Pages

96–97

Proceedings

Summaries Volume Process Control 01

ISBN

80-227-1542-5

Publisher

Faculty of Electrical Engineering and Informatics, University of Technology Košice

Place

Štrbské Pleso

BibTeX

@inproceedings{BUT5744,
  author="Pavel {Zemčík} and Otto {Fučík} and Miloslav {Richter} and Pavel {Valenta}",
  title="Imaging Algorithm Speedup Using Co-Design",
  booktitle="Summaries Volume Process Control 01",
  year="2001",
  pages="96--97",
  publisher="Faculty of Electrical Engineering and Informatics, University of Technology Košice",
  address="Štrbské Pleso",
  isbn="80-227-1542-5"
}