Publication Details
Methodology for Design of Highly Dependable Systems in FPGA
Kaštil Jan, Ing., Ph.D.
Kotásek Zdeněk, doc. Ing., CSc.
system design, fault tolerance, architecture, reconfiguration, FPGA, soft error, methodology
In the paper, a survey of our research activities the goal of which is to develop a methodology allowing to design highly dependable system in FPGA is described. First, our experiences with partial dynamic reconfiguration in FPGA and application of partial reconfiguration as advanced solution for constructing of different types of fault tolerant architectures are described. Secondly, the main principles of methodology and first experiments with real fault tolerant designs based on partial dynamic reconfiguration implemented into Virtex5 and latest Virtex6 FPGAs are demonstrated.
In the paper, a survey of our research activities the goal of which is to develop a methodology allowing to design highly dependable system in FPGA is described. First, our experiences with partial dynamic reconfiguration in FPGA and application of partial reconfiguration as advanced solution for constructing of different types of fault tolerant architectures are described. Secondly, the main principles of methodology and first experiments with real fault tolerant designs based on partial dynamic reconfiguration implemented into Virtex5 and latest Virtex6 FPGAs are demonstrated.
@inproceedings{BUT35527,
author="Martin {Straka} and Jan {Kaštil} and Zdeněk {Kotásek}",
title="Methodology for Design of Highly Dependable Systems in FPGA",
booktitle="International Scientific Conference on Computer Science and Engineering",
year="2010",
pages="186--193",
publisher="The University of Technology Košice",
address="Košice",
isbn="978-80-8086-164-3"
}