Publication Details
Fast Packet Classification Using Perfect Hash Functions
FPGA, Hardware, Firewall
Packet classification is an important operation for applications such as routers, firewalls or intrusion detection systems. Many algorithms and hardware architectures for packet classification have been created, but none of them can compete with the speed of TCAMs in the worst case. I propose new hardware-based algorithm for packet classification. The solution is based on problem decomposition and is aimed at the highest network speeds. A unique property of the algorithm is the constant time complexity in terms of external memory accesses. The algorithm performs exactly two external memory accesses to classify a packet. Using FPGA and one commodity SRAM chip, a throughput of 150 million packets per second can be achieved.
@inproceedings{BUT30720,
author="Viktor {Puš}",
title="Fast Packet Classification Using Perfect Hash Functions",
booktitle="ACM Student Research Competition 2008",
year="2008",
pages="9--16",
address="Praha",
isbn="978-80-01-04205-2"
}