Publication Details

HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware

ZACHARIÁŠOVÁ, M.; LENGÁL, O.; KAJAN, M. HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware. 8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: 2012. p. 1 (1 s.).

Czech title

HAVEN: Otevřený rámec pro akceleraci funkční verifikace hardware pomocí FPGA

Type

abstract

Language

English

Authors

Zachariášová Marcela, Ing., Ph.D. (DCSY)
Lengál Ondřej, Ing., Ph.D. (DITS)
Kajan Michal, Ing.

Keywords

FPGA, hardware acceleration, functional verification

Abstract

In this presentation, we introduce HAVEN, an open framework for acceleration of
simulation-based verification runs using the FPGA technology.

Published

2012

Pages

1–1

Book

8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science

Place

Brno

BibTeX

@misc{BUT192520,
  author="Marcela {Zachariášová} and Ondřej {Lengál} and Michal {Kajan}",
  title="HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware",
  booktitle="8th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
  year="2012",
  pages="1--1",
  address="Brno",
  note="abstract"
}