Publication Details

A Choice of SM/DM Parallel ANN Implementation for Embedded Applications

DVOŘÁK, V.; ČEJKA, R. A Choice of SM/DM Parallel ANN Implementation for Embedded Applications. Proceedings of the 7th IEEE International Conference on ECBS. Edinburgh, Scotland: IEEE Computer Society Press, 2000. p. 18-23. ISBN: 0-7695-604-6.
Czech title
Volba ANN SM/DM paralelní implementace pro vestavěné aplikace
Type
conference paper
Language
English
Authors
Dvořák Václav, prof. Ing., DrSc.
Čejka Rudolf, Ing. (CVT)
Keywords

Multi-layer perceptron, shared and distributed memory, modeling, communicating sequential processes

Abstract

This paper examines implementations of a multi-layer perceptron (MLP) on bus-based shared memory (SM) and on distributed memory (DM) multiprocessor systems. The goal has been to optimize HW and SW architectures in order to obtain the fastest response possible. Prototyping parallel MLP algorithms for up to 8 processing nodes with the DM as well as SM memory was done using CSP-based TRANSIM tool. The results of prototyping MLPs of different sizes on various number of processing nodes demonstrate the feasible speedups, efficiency and time responses for the given CPU speed, link speed or bus bandwidth.

Published
2000
Pages
18–23
Proceedings
Proceedings of the 7th IEEE International Conference on ECBS
ISBN
0-7695-604-6
Publisher
IEEE Computer Society Press
Place
Edinburgh, Scotland
BibTeX 
@inproceedings{BUT192344,
  author="Václav {Dvořák} and Rudolf {Čejka}",
  title="A Choice of SM/DM Parallel ANN Implementation for Embedded Applications",
  booktitle="Proceedings of the 7th IEEE International Conference on ECBS",
  year="2000",
  pages="18--23",
  publisher="IEEE Computer Society Press",
  address="Edinburgh, Scotland",
  isbn="0-7695-604-6"
}
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