Publication Details
Real-Time HDR Video Processing and Compression Using an FPGA
Musil Petr, Ing., Ph.D. (DCGM)
Zemčík Pavel, prof. Dr. Ing., dr. h. c. (DCGM)
High dynamic range imaging HDR Image processing Image compression Multi-exposure image Programmable hardware Field programmable gate array (FPGA)
Real-time video processing of high dynamic range (HDR) content is an important and demanding task. This chapter demonstrates how a HDR video can be acquired in real-time through multi-exposure using standard image sensors, how the data can be fused, processed, and compressed in real-time, all using field programmable gate arrays (FPGA). The chapter describes a block diagram of the system built from an off-the-shelf camera and custom electronics, shows how the processing and compression algorithms work and what are their features, and also how they can be implemented using the FPGA, including a basic information about the results of such implementation.
@inbook{BUT163810,
author="Martin {Musil} and Petr {Musil} and Pavel {Zemčík}",
title="Real-Time HDR Video Processing and Compression Using an FPGA",
booktitle="High Dynamic Range Video",
year="2016",
publisher="Elsevier Science",
address="Amsterdam",
pages="145--154",
doi="10.1016/B978-0-12-809477-8.00007-8",
isbn="978-0-08-101038-9",
url="https://www-sciencedirect-com.ezproxy.lib.vutbr.cz/science/article/pii/B9780128094778000078?via%3Dihub"
}