Publication Details

Towards novel format for representation of polymorphic circuits

CRHA, A.; ŠIMEK, V.; RŮŽIČKA, R. Towards novel format for representation of polymorphic circuits. In 13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Taormina: IEEE Circuits and Systems Society, 2018. p. 1-2. ISBN: 978-1-5386-5290-9.
Czech title
Nový formát reprezentace polymorfních obvodů
Type
conference paper
Language
English
Authors
Crha Adam, Ing., Ph.D. (RG POLY)
Šimek Václav, Ing. (DCSY)
Růžička Richard, doc. Ing., Ph.D., MBA (DCSY)
Keywords

Polymorphic electronics, synthesis techniques, And-Inverter graph, circuit representation.

Abstract

This paper is focused on the introduction of a novel format for representation of complex polymorphic circuits. Core of this newly presented format is based on the exploitation of And-Inverter Graph (AIG) scheme with a number of extensions. Then, synthesis flow can exploit considerable advantages in terms of the capability to handle at ease more extensive circuit structures involving hundreds of gates and employ subsequent optimization techniques resulting in an improved area-efficiency performance. The actual format notation, explanation of its visual features appearance meaning and comparison with selected conventional approaches are presented. Finally, accomplished experimental results and their analysis is provided.

Published
2018
Pages
1–2
Proceedings
13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
ISBN
978-1-5386-5290-9
Publisher
IEEE Circuits and Systems Society
Place
Taormina
DOI
10.1109/DTIS.2018.8368583
UT WoS
000588554800035
EID Scopus
2-s2.0-85048857985
BibTeX 
@inproceedings{BUT155057,
  author="Adam {Crha} and Václav {Šimek} and Richard {Růžička}",
  title="Towards novel format for representation of polymorphic circuits",
  booktitle="13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)",
  year="2018",
  pages="1--2",
  publisher="IEEE Circuits and Systems Society",
  address="Taormina",
  doi="10.1109/DTIS.2018.8368583",
  isbn="978-1-5386-5290-9",
  url="https://www.fit.vut.cz/research/publication/11741/"
}
Back to top