Detail výsledku

Imaging Algorithm Speedup Using Co-Design

ZEMČÍK, P.; FUČÍK, O.; RICHTER, M.; VALENTA, P. Imaging Algorithm Speedup Using Co-Design. Summaries Volume Process Control 01. Štrbské Pleso: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2001. p. 96-97. ISBN: 80-227-1542-5.
Typ
článek ve sborníku konference
Jazyk
angličtina
Autoři
Zemčík Pavel, prof. Dr. Ing., dr. h. c.
Fučík Otto, doc. Dr. Ing.
Richter Miloslav, Ing., Ph.D., UAMT (FEKT)
Valenta Pavel, Ing., FEKT (FEKT)
Abstrakt

The contribution shows a possibility to speed up image processing algorithms using a suitable combination of DSP and FPGA and also demonstrates methods to distribute the computational tasks between the DSP and FPGA.

Klíčová slova

co-design, image processing, FPGA

Rok
2001
Strany
96–97
Sborník
Summaries Volume Process Control 01
Konference
PROCESS CONTROL 01
ISBN
80-227-1542-5
Vydavatel
Faculty of Electrical Engineering and Informatics, University of Technology Košice
Místo
Štrbské Pleso
BibTeX 
@inproceedings{BUT5744,
  author="Pavel {Zemčík} and Otto {Fučík} and Miloslav {Richter} and Pavel {Valenta}",
  title="Imaging Algorithm Speedup Using Co-Design",
  booktitle="Summaries Volume Process Control 01",
  year="2001",
  pages="96--97",
  publisher="Faculty of Electrical Engineering and Informatics, University of Technology Košice",
  address="Štrbské Pleso",
  isbn="80-227-1542-5"
}
Pracoviště
Fakulta informačních technologií (FIT)
Ústav automatizace a měřicí techniky (UAMT)
Nahoru