Detail výsledku

Evolutionary Design of Digital Circuits: Where Are Current Limits?

SEKANINA, L. Evolutionary Design of Digital Circuits: Where Are Current Limits?. Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems. Piscataway: IEEE Computer Society, 2006. p. 171-178. ISBN: 0-7695-2614-4.
Typ
článek ve sborníku konference
Jazyk
angličtina
Autoři
Sekanina Lukáš, prof. Ing., Ph.D., UPSY (FIT)
Abstrakt

The objective of this paper is to classify the approaches proposed to the evolutionary digital circuit design in the recent years and to identify the levels of complexity and innovation that can be obtained by means of these approaches. In particular, gate-level evolution, circuit evolution in PLAs, functional-level evolution, incremental evolution, evolution utilizing developmental schemes and some application-specific schemes are analyzed. It is shown that we are able to effectively explore the search spaces not much larger than 2^1000 points and that the innovative solutions can be produced independently of the utilized method.

Klíčová slova

evolutionary design, digital design, reconfigurable circuit

URL
Rok
2006
Strany
171–178
Sborník
Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems
Konference
1st NASA/ESA Conference on Adaptive Hardware and Systems
ISBN
0-7695-2614-4
Vydavatel
IEEE Computer Society
Místo
Piscataway
BibTeX 
@inproceedings{BUT22206,
  author="Lukáš {Sekanina}",
  title="Evolutionary Design of Digital Circuits: Where Are Current Limits?",
  booktitle="Proc. of the 1st NASA/ESA Conference on Adaptive Hardware and Systems",
  year="2006",
  pages="171--178",
  publisher="IEEE Computer Society",
  address="Piscataway",
  isbn="0-7695-2614-4",
  url="http://www.fit.vutbr.cz/~sekanina/publ/ahs06/ahs06-limits.pdf"
}
Projekty
Moderní metody syntézy číslicových systémů, GAČR, Standardní projekty, GA102/04/0737, zahájení: 2004-01-01, ukončení: 2006-12-31, ukončen
Výzkumné skupiny
EvoAI Hardware (VZ EHW)
Pracoviště
Ústav počítačových systémů (UPSY)
Nahoru