Power Consumption Analysis of New Generation of Polymorphic Gates

One of the possible ways how to accomplish multifunctional digital circuits follows the paradigm of Polymorphic electronics. Design of such circuits is closely related to the availability of suitable polymorphic gates. Unfortunately, the actual electronic properties of the polymorphic gates published in the past were way too far from matching their conventional CMOS counterparts. A new type of polymorphic gates with significantly better parameters has been recently shown: Gates whose function is determined by the polarity of dedicated supply rails. Such gates have been investigated mostly in terms of their size and propagation delay. In this paper, power consumption of exactly such gates is being analysed. That makes it possible to identify the best variants among them and subsequently compare their properties with conventional CMOS circuits. Furthermore, an extensive gate set consisting of individual polymorphic gates with the lowest power consumption was introduced together with a gate set demonstrating the best found trade-off between gate size, delay and power consumption. Both sets are integrated now into the PoLibSi library - freely available library with polymorphic gates of the new generation.