Detail publikace

Behavioral Analysis for Testability on VHDL Source File

KOTÁSEK, Z.; RŮŽIČKA, R. Behavioral Analysis for Testability on VHDL Source File. Proceedings of Design and Diagnostics of Electronic Circuits and Systems Workshopsborník konference IEEE DDECS. Bratislava: Slovak Academy of Science, 2000. p. 209-212. ISBN: 80-968320-3.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Kotásek Zdeněk, doc. Ing., CSc.
Růžička Richard, doc. Ing., Ph.D., MBA (UPSY)
Klíčová slova

behaviorální analýza testovatelnosti číslicových obvodů

Abstrakt

The goal of the research activities the results of which are presented in this paper is to experiment with the VHDL resulting RTL/gate level structures. The results of experiments with different types of VHDL statements are behavioral source text and analyse the summarised.

Rok
2000
Strany
209–212
Sborník
Proceedings of Design and Diagnostics of Electronic Circuits and Systems Workshopsborník konference IEEE DDECS
ISBN
80-968320-3
Vydavatel
Slovak Academy of Science
Místo
Bratislava
BibTeX 
@inproceedings{BUT191917,
  author="Zdeněk {Kotásek} and Richard {Růžička}",
  title="Behavioral Analysis for Testability on VHDL Source File",
  booktitle="Proceedings of Design and Diagnostics of Electronic Circuits and Systems Workshopsborník konference IEEE DDECS",
  year="2000",
  pages="209--212",
  publisher="Slovak Academy of Science",
  address="Bratislava",
  isbn="80-968320-3"
}
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