Detail publikace

The Concept of Pseudo Evolvable Hardware

SEKANINA, L.; DRÁBEK, V. The Concept of Pseudo Evolvable Hardware. IFAC Workshop on Programmable Devices and Systems 2000. Elsevier Science Ltd. Oxford: unknown, 2000. p. 0-0. ISBN: 0-08-043620-X.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Sekanina Lukáš, prof. Ing., Ph.D. (UPSY)
Drábek Vladimír, doc. Ing., CSc. (FIT)
Klíčová slova

pseudo evolvable hardware, reconfigurable circuit

Abstrakt

Evolvable hardware is a new technology, where circuit connection is subject to evolution. The model of the evolvable circuit is used in the task of image compression. This work is done with evolvable hardware at function level. Possible hardware implementations are discussed and a new concept of constrained evolution - pseudo evolvable hardware - is opened. This paper describes the implementation principle of a virtual evolvable machine on top of a normal FPGA. In this way, the current FPGAs can implement evolvable circuit.

Rok
2000
Strany
6
Sborník
IFAC Workshop on Programmable Devices and Systems 2000
ISBN
0-08-043620-X
Vydavatel
unknown
Místo
Elsevier Science Ltd. Oxford
BibTeX 
@inproceedings{BUT191615,
  author="Lukáš {Sekanina} and Vladimír {Drábek}",
  title="The Concept of Pseudo Evolvable Hardware",
  booktitle="IFAC Workshop on Programmable Devices and Systems 2000",
  year="2000",
  pages="6",
  publisher="unknown",
  address="Elsevier Science Ltd. Oxford",
  isbn="0-08-043620-X"
}
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