Detail publikace

The use of VHDL in designing with gate arrays

ZENDULKA, J. The use of VHDL in designing with gate arrays. Proceedings of MOSIS'96, Volume 2. Krnov: 1996. p. 142-147. ISBN: 80-85988-03-8.

Typ

článek ve sborníku konference

Jazyk

anglicky

Autoři

Zendulka Jaroslav, doc. Ing., CSc. (UIFS)

Klíčová slova

field programmable gate array, Xilinx, VHDL, simulation

Rok

1996

Strany

142–147

Sborník

Proceedings of MOSIS'96, Volume 2

ISBN

80-85988-03-8

Místo

Krnov

BibTeX

@inproceedings{BUT191399,
  author="Jaroslav {Zendulka}",
  title="The use of VHDL in designing with gate arrays",
  booktitle="Proceedings of MOSIS'96, Volume 2",
  year="1996",
  pages="142--147",
  address="Krnov",
  isbn="80-85988-03-8"
}