Verification and Validation Methods for Formal Descriptions

grant

verification, testing, proof checking, temporal logics, process algebras, tools, case studies

1) Verification (software & hardware), testing, proof checking, temporal
logic, simulation, visualization, transformation, finite state machines.

2) Languages, formal semantics, standardization, specification, temporal
logic, process algebras, object orientation, data types, modularity,
non-functional aspects.

3) Implementation, tools

4) Case studies, distributed systems, intelligence networks

5) Real time

Křetínský Mojmír, prof. RNDr., CSc. (CK-SZZ)
Šárek Milan
Švéda Miroslav, prof. Ing., CSc. (UTKO)