Publication Details

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

MIČULKA, L.; KOTÁSEK, Z. Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System. 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. Cesme-Izmir: IEEE Computer Society, 2012. p. 20-21. ISBN: 978-3-902457-33-2.

Czech title

Synchronizace návrhu po provedení částečné dynamické rekonfiguraceon of Fault Tolerant System

Type

conference paper

Language

English

Authors

Mičulka Lukáš, Ing., Ph.D.
Kotásek Zdeněk, doc. Ing., CSc.

Keywords

FPGA, reconfiguration, synchronization

Abstract

This paper is focused to present the methods of design synchronization after the partial dynamic reconfiguration of FPGA and also there was introduced a new method inspired from one widely used.

Published

2012

Pages

20–21

Proceedings

15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools

ISBN

978-3-902457-33-2

Publisher

IEEE Computer Society

Place

Cesme-Izmir

BibTeX

@inproceedings{BUT97023,
  author="Lukáš {Mičulka} and Zdeněk {Kotásek}",
  title="Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System",
  booktitle="15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools",
  year="2012",
  pages="20--21",
  publisher="IEEE Computer Society",
  address="Cesme-Izmir",
  isbn="978-3-902457-33-2"
}