Publication Details
Polymorphic Gates in Design and Test of Digital Circuits
Stareček Lukáš, Ing., Ph.D. (RG EHW)
Kotásek Zdeněk, doc. Ing., CSc.
Gajda Zbyšek, Ing., Ph.D. (RG EHW)
digital circuit, polymorphic gate, test, adaptation, evolutionary algorithm
Polymorphic gates are unconventional logic components which can switch their
logic functions according to changing environment. The first part of this study
presents an evolutionary approach to the design of polymorphic modules which
exhibit different logic functions in different environments. The most complicated
circuit that we evolved contains more than 100 gates. The second part of this
study shows how to reduce the number of test vectors of a digital circuit by
replacing some of its gates by polymorphic gates. In the first polymorphic mode,
the circuit implements the original function. When switched to the second
polymorphic mode, it can be tested using fewer test vectors than in the first
polymorphic mode; however, the same fault coverage is obtained. The number of
test vectors was reduced on 50-91% of its original volume for six benchmark
circuits. The paper also discusses various obstacles which one has to deal with
during a practical utilization of polymorphic gates.
@article{BUT48167,
author="Lukáš {Sekanina} and Lukáš {Stareček} and Zdeněk {Kotásek} and Zbyšek {Gajda}",
title="Polymorphic Gates in Design and Test of Digital Circuits",
journal="International Journal of Unconventional Computing",
year="2008",
volume="4",
number="2",
pages="125--142",
issn="1548-7199",
url="https://www.fit.vut.cz/research/publication/8587/"
}