Publication Details

Cache-Based Parallel Particle Rendering Engine

TIŠNOVSKÝ, P.; HEROUT, A.; ZEMČÍK, P. Cache-Based Parallel Particle Rendering Engine. ElectronicsLetters.com - http://www.electronicsletters.com, 2003, vol. 2003, no. 1, p. 0-0. ISSN: 1213-161X.

Czech title

Paralelní stroj pro zobrazování částicových systémů založený na mechanismech cache

Type

journal article

Language

English

Authors

Tišnovský Pavel, Ing.
Herout Adam, prof. Ing., Ph.D. (DCGM)
Zemčík Pavel, prof. Dr. Ing., dr. h. c. (DCGM)

Keywords

particle, surfel, particle renderer, particle rendering engine, FieldProgrammable Gate Array - FPGA, Content Addressable Memory - CAM,Digital Signal Processor - DSP, Programmable Switching Matrix - PSM,Configurable Logic Block - CLB, cache, spatial data locality

Abstract

Current hardware graphics rendering engines efficiently process hugeamount of triangle data, but are not as suitable when operating onpoint-based scenes. This paper presents an architectural design forpoint-based rendering. We are using a previously developed hardwaremodel featuring FPGA, DSP and CAM memory.

Published

2003

Pages

Journal

ElectronicsLetters.com - http://www.electronicsletters.com, vol. 2003, no. 1, ISSN 1213-161X

Book

Electronics Letters

BibTeX

@article{BUT42291,
  author="Pavel {Tišnovský} and Adam {Herout} and Pavel {Zemčík}",
  title="Cache-Based Parallel Particle Rendering Engine",
  journal="ElectronicsLetters.com - http://www.electronicsletters.com",
  year="2003",
  volume="2003",
  number="1",
  pages="8",
  issn="1213-161X"
}