Publication Details

Evolving Component Library for Approximate High Level Synthesis

VAVERKA, F.; HRBÁČEK, R.; SEKANINA, L. Evolving Component Library for Approximate High Level Synthesis. In 2016 IEEE Symposium Series on Computational Intelligence. Athens: IEEE Computational Intelligence Society, 2016. p. 1-8. ISBN: 978-1-5090-4240-1.
Czech title
Evoluční návrh knihovny komponent pro vysokoúrovňovou syntézu
Type
conference paper
Language
English
Authors
Vaverka Filip, Ing., Ph.D.
Hrbáček Radek, Ing., Ph.D. (RG EHW)
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY)
Keywords

approximate computing, cartesian genetic programming, evolutionary algorithms,
multi-objective optimization, high level synthesis

Abstract

An approximate computing approach has recently been introduced for high level
circuit synthesis (HLS) in order to make good use of approximate circuits at
system and block level. It is assumed in HLS algorithms that a component library
containing various implementations of elementary circuit components is available.
An open problem is how to construct such a component library in the context of
approximate computing, where the component's error is a new design variable and
hence many compromise implementations exist for a given component. In this paper,
we first introduce a multi-objective Cartesian genetic programming method to
create a comprehensive component library containing hundreds of Pareto optimal
implementations of approximate 8-bit adders and multipliers, where the error,
area and delay are simultaneously optimized. Another multi-objective evolutionary
algorithm is employed to solve the so called binding problem of HLS, in which
suitable approximate components are assigned to nodes of the data flow graph
describing a complex digital circuit. Two approaches are then proposed and
compared in order to reduce the size of the library of approximate components. 
It is shown that a random subsampling of the component library provides
satisfactory results in the context of our study. The proposed methods are
evaluated using two benchmark circuits -- the reduce (sum) and DCT circuits.

Published
2016
Pages
1–8
Proceedings
2016 IEEE Symposium Series on Computational Intelligence
Conference
IEEE Symposium Series on Computational Intelligence 2016, Athens, GR
ISBN
978-1-5090-4240-1
Publisher
IEEE Computational Intelligence Society
Place
Athens
DOI
UT WoS
000400488302074
EID Scopus
BibTeX
@inproceedings{BUT131007,
  author="Filip {Vaverka} and Radek {Hrbáček} and Lukáš {Sekanina}",
  title="Evolving Component Library for Approximate High Level Synthesis",
  booktitle="2016 IEEE Symposium Series on Computational Intelligence",
  year="2016",
  pages="1--8",
  publisher="IEEE Computational Intelligence Society",
  address="Athens",
  doi="10.1109/SSCI.2016.7850168",
  isbn="978-1-5090-4240-1",
  url="https://www.fit.vut.cz/research/publication/11231/"
}
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