Publication Details
Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability
ATPG, funkční verifikace.
As the complexity of current hardware systems rises rapidly, it is a challenging task to harden these systems against faults and to complete their verification and manufacturing test. Not only that verification and testing take a considerable amount of time but the number of design errors, faults, manufacturing defects and crosstalks increases with the rising complexity as well. Furthermore, when a system is designed to be reliable new issues come into play making the picture even more complex. In this paper we performed a detailed analysis of two approaches devoted to verification of hardened systems, with respect to the test set generation: the first one is based on classical Automatic Test Pattern Generation, the second one on Constrained-random Stimulus Generation. We evaluated their qualities as well as their drawbacks and introduced few ideas about their combination in order to create a new promising approach for verification of reliable systems.
@inproceedings{BUT103467,
author="Marcela {Zachariášová} and Cristiana {Bolchini} and Zdeněk {Kotásek}",
title="Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability",
booktitle="IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
year="2013",
pages="275--278",
publisher="IEEE Computer Society",
address="Karlovy Vary",
isbn="978-1-4673-6133-0"
}