Project Details

Využití funkční verifikace při vývoji pokročilých číslicových obvodů

Project Period: 1. 1. 2012 – 31. 12. 2012

Project Type: grant

Code: FR1798/2012/G1

Agency: Ministerstvo školství, mládeže a tělovýchovy ČR

Program: Fond rozvoje vysokých škol (FRVŠ)

English title

Application of functional verification in the digital circuits development process

Type

grant

Keywords

functional verification, digital circuits

Abstract

This project is aimed at creating additional study and demonstration materials
for the course in Advanced Digital Systems (PCS). The produced materials will
possibly be used in other courses dealing with the design of digital systems,
such as Digital Systems Design (INC) and Hardware/software Codesign (HSC).The set
of materials will comprise a presentation containing a basic introduction to the
area of functional verification and its use in the development process of digital
systems with a high level of complexity. These materials will be supplemented
with demonstration materials illustrating the creation, modification and
application of verification environments and working with modern simulation tools
used in practice.

Team members

Lengál Ondřej, Ing., Ph.D. (DITS) – research leader
Kajan Michal, Ing.
Kotásek Zdeněk, doc. Ing., CSc.

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