// Verilog definition of TB9
// created by TB

module TB9(N186, N187, N188, N189, N190, N191, N192, N193, N194, N195, N196, N197, N198);
input N186;
input N187;
input N188;
input N189;
input N190;
input N191;
input N192;
input N193;
output N194;
output N195;
output N196;
output N197;
output N198;

  wire N202;
  wire N203;

  dffs reg_Data_out_dup_6_r(N194, N186, N190, N202, N203);
  tri01 tri_Data_out_0(N189, N203, N198);
  mux21 ix285(N203, N188, N187, N194);
  tri01 tri_Data_out_1(N191, N203, N197);
  tri01 tri_Data_out_2(N192, N203, N196);
  tri01 tri_Data_out_3(N193, N203, N195);

endmodule
