// Verilog definition of TB9
// created by TB

module TB9(N178, N179, N180, N181, N182, N183, N184, N185, N186, N187, N188, N189, N190);
input N178;
input N179;
input N180;
input N181;
input N182;
input N183;
input N184;
input N185;
output N186;
output N187;
output N188;
output N189;
output N190;

  wire N194;
  wire N195;

  dffs reg_Data_out_dup_6_r(N186, N178, N182, N194, N195);
  tri01 tri_Data_out_0(N181, N195, N190);
  mux21 ix285(N195, N180, N179, N186);
  tri01 tri_Data_out_1(N183, N195, N189);
  tri01 tri_Data_out_2(N184, N195, N188);
  tri01 tri_Data_out_3(N185, N195, N187);

endmodule
