// Verilog definition of TB2
// created by TB

module TB2(N62, N63, N64, N65, N66, N67, N68);
input N62;
input N63;
input N64;
input N65;
input N66;
output N67;
output N68;

  wire N69;
  wire N73;
  wire N80;

  inv02 ix133(N69, N68);
  oai21 ix21(N63, N66, N73, N69);
  nand02_2x ix136(N64, N65, N73);
  ao21 ix138(N62, N64, N80, N67);
  and02 ix9(N63, N73, N80);

endmodule
