// Verilog definition of TB3
// created by TB

module TB3(N66, N67, N68, N69, N70, N71, N72, N73, N74, N75, N76, N77, N78);
input N66;
input N67;
input N68;
input N69;
input N70;
input N71;
input N72;
input N73;
output N74;
output N75;
output N76;
output N77;
output N78;

  wire N82;
  wire N83;

  dffs reg_Data_out_dup_6_r(N74, N66, N70, N82, N83);
  tri01 tri_Data_out_0(N69, N83, N78);
  mux21 ix285(N83, N68, N67, N74);
  tri01 tri_Data_out_1(N71, N83, N77);
  tri01 tri_Data_out_2(N72, N83, N76);
  tri01 tri_Data_out_3(N73, N83, N75);

endmodule
