// Verilog definition of TB9
// created by TB

module TB9(N176, N177, N178, N179, N180, N181, N182, N183, N184, N185, N186, N187, N188);
input N176;
input N177;
input N178;
input N179;
input N180;
input N181;
input N182;
input N183;
output N184;
output N185;
output N186;
output N187;
output N188;

  wire N192;
  wire N193;

  dffs reg_Data_out_dup_6_r(N184, N176, N180, N192, N193);
  tri01 tri_Data_out_0(N179, N193, N188);
  mux21 ix285(N193, N178, N177, N184);
  tri01 tri_Data_out_1(N181, N193, N187);
  tri01 tri_Data_out_2(N182, N193, N186);
  tri01 tri_Data_out_3(N183, N193, N185);

endmodule
