// Verilog definition of TB4
// created by TB

module TB4(N94, N95, N96, N97, N98, N99, N100, N101, N102, N103, N104, N105, N106);
input N94;
input N95;
input N96;
input N97;
input N98;
input N99;
input N100;
input N101;
output N102;
output N103;
output N104;
output N105;
output N106;

  wire N110;
  wire N111;

  dffs reg_Data_out_dup_6_r(N102, N94, N98, N110, N111);
  tri01 tri_Data_out_0(N97, N111, N106);
  mux21 ix285(N111, N96, N95, N102);
  tri01 tri_Data_out_1(N99, N111, N105);
  tri01 tri_Data_out_2(N100, N111, N104);
  tri01 tri_Data_out_3(N101, N111, N103);

endmodule
