// Verilog definition of TB3
// created by TB

module TB3(N48, N49, N50, N51, N52, N53, N54, N55, N56, N57, N58, N59, N60);
input N48;
input N49;
input N50;
input N51;
input N52;
input N53;
input N54;
input N55;
output N56;
output N57;
output N58;
output N59;
output N60;

  wire N64;
  wire N65;

  dffs reg_Data_out_dup_6_r(N56, N48, N52, N64, N65);
  tri01 tri_Data_out_0(N51, N65, N60);
  mux21 ix285(N65, N50, N49, N56);
  tri01 tri_Data_out_1(N53, N65, N59);
  tri01 tri_Data_out_2(N54, N65, N58);
  tri01 tri_Data_out_3(N55, N65, N57);

endmodule
