// Verilog definition of TB2
// created by TB

module TB2(N36, N37, N38, N39, N40, N41, N42, N43);
input N36;
input N37;
input N38;
input N39;
input N40;
output N41;
output N42;
output N43;

  wire N47;
  wire N48;
  wire N50;
  wire N53;
  wire N57;
  wire N63;

  xor2 ix35(N37, N39, N43);
  xnor2 ix33(N47, N48, N42);
  mux21_ni ix25(N50, N37, N39, N53);
  inv02 ix107(N40, N50);
  xnor2_2x ix109(N36, N57, N48);
  xnor2_2x ix111(N40, N38, N57);
  xnor2 ix31(N40, N63, N41);
  mux21_ni ix29(N47, N57, N48, N63);
  buf02 ix118(N53, N47);

endmodule
