// Verilog definition of TB3
// created by TB

module TB3(N53, N54, N55, N56, N57, N58, N59, N60, N61, N62, N63, N64, N65);
input N53;
input N54;
input N55;
input N56;
input N57;
input N58;
input N59;
input N60;
output N61;
output N62;
output N63;
output N64;
output N65;

  wire N69;
  wire N70;

  dffs reg_Data_out_dup_6_r(N61, N53, N57, N69, N70);
  tri01 tri_Data_out_0(N56, N70, N65);
  mux21 ix285(N70, N55, N54, N61);
  tri01 tri_Data_out_1(N58, N70, N64);
  tri01 tri_Data_out_2(N59, N70, N63);
  tri01 tri_Data_out_3(N60, N70, N62);

endmodule
