// Verilog definition of TB4
// created by TB

module TB4(N98, N99, N100, N101, N102, N103, N104, N105, N106, N107, N108, N109, N110);
input N98;
input N99;
input N100;
input N101;
input N102;
input N103;
input N104;
input N105;
output N106;
output N107;
output N108;
output N109;
output N110;

  wire N114;
  wire N115;

  dffs reg_Data_out_dup_6_r(N106, N98, N102, N114, N115);
  tri01 tri_Data_out_0(N101, N115, N110);
  mux21 ix285(N115, N100, N99, N106);
  tri01 tri_Data_out_1(N103, N115, N109);
  tri01 tri_Data_out_2(N104, N115, N108);
  tri01 tri_Data_out_3(N105, N115, N107);

endmodule
