// Verilog definition of TB3
// created by TB

module TB3(N56, N57, N58, N59, N60, N61, N62, N63, N64, N65, N66, N67, N68);
input N56;
input N57;
input N58;
input N59;
input N60;
input N61;
input N62;
input N63;
output N64;
output N65;
output N66;
output N67;
output N68;

  wire N72;
  wire N73;

  dffs reg_Data_out_dup_6_r(N64, N56, N60, N72, N73);
  tri01 tri_Data_out_0(N59, N73, N68);
  mux21 ix285(N73, N58, N57, N64);
  tri01 tri_Data_out_1(N61, N73, N67);
  tri01 tri_Data_out_2(N62, N73, N66);
  tri01 tri_Data_out_3(N63, N73, N65);

endmodule
