// Verilog definition of TB2
// created by TB

module TB2(N41, N42, N43, N44, N45, N46, N47, N48);
input N41;
input N42;
input N43;
input N44;
input N45;
output N46;
output N47;
output N48;

  wire N52;
  wire N53;
  wire N55;
  wire N58;
  wire N62;
  wire N68;

  xor2 ix35(N42, N44, N48);
  xnor2 ix33(N52, N53, N47);
  mux21_ni ix25(N55, N42, N44, N58);
  inv02 ix107(N45, N55);
  xnor2_2x ix109(N41, N62, N53);
  xnor2_2x ix111(N45, N43, N62);
  xnor2 ix31(N45, N68, N46);
  mux21_ni ix29(N52, N62, N53, N68);
  buf02 ix118(N58, N52);

endmodule
