// Verilog definition of TB3
// created by TB

module TB3(N58, N59, N60, N61, N62, N63, N64, N65, N66, N67, N68, N69, N70);
input N58;
input N59;
input N60;
input N61;
input N62;
input N63;
input N64;
input N65;
output N66;
output N67;
output N68;
output N69;
output N70;

  wire N74;
  wire N75;

  dffs reg_Data_out_dup_6_r(N66, N58, N62, N74, N75);
  tri01 tri_Data_out_0(N61, N75, N70);
  mux21 ix285(N75, N60, N59, N66);
  tri01 tri_Data_out_1(N63, N75, N69);
  tri01 tri_Data_out_2(N64, N75, N68);
  tri01 tri_Data_out_3(N65, N75, N67);

endmodule
