Publication Details

Verification of Fault-tolerant Methodologies for FPGA Systems

ZACHARIÁŠOVÁ, M.; KAŠTIL, J.; KOTÁSEK, Z. Verification of Fault-tolerant Methodologies for FPGA Systems. The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12). Annecy: Politecnico di Milano, 2012. p. 55-58.

Czech title

Verifikace systémů odolných vůči poruchám pro FPGA systémy

Type

conference paper

Language

English

Authors

Zachariášová Marcela, Ing., Ph.D. (DCSY)
Kaštil Jan, Ing., Ph.D.
Kotásek Zdeněk, doc. Ing., CSc.

Keywords

fault-tolerant, FPGA, partial dynamic reconfiguration

Abstract

The aim of this paper is to fi nd a way how to utilize and compare diff erent FT methodologies we have been working with during the last few years as well as those which are new in the FT fi eld. Moreover, we present a platform for testing di erent FT methodologies implemented in an FPGA. The testing is based on the software-based injection of an SEU into the selected region of the FPGA from a PC through the JTAG interface. After fault injection into a non-speci c place in the FPGA it is necessary to explore the whole state space using input test vectors.

Published

2012

Pages

55–58

Proceedings

The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12)

Publisher

Politecnico di Milano

Place

Annecy

BibTeX

@inproceedings{BUT97007,
  author="Marcela {Zachariášová} and Jan {Kaštil} and Zdeněk {Kotásek}",
  title="Verification of Fault-tolerant Methodologies for FPGA Systems",
  booktitle="The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12)",
  year="2012",
  pages="55--58",
  publisher="Politecnico di Milano",
  address="Annecy"
}