Publication Details

Packet Classification Algorithms

PUŠ, V. Packet Classification Algorithms. Počítačové architektury a diagnostika. Stará Lesná: Faculty of Electrical Engineering and Information Technology, Slovak University of Technology in Bratislava, 2011. p. 157-162. ISBN: 978-80-227-3552-0.
Czech title
Algoritmy klasifikace paketů
Type
conference paper
Language
English
Authors
Puš Viktor, Ing., Ph.D.
Keywords

Packet Classification, FPGA, Optimization

Abstract

As network speeds are increasing, the demand for hardware acceleration of packet classification in FPGAs or ASICs is growing. Nowadays algorithms implemented in hardware can achieve multigigabit speeds, but they suffer with great memory overhead. This paper presents three packet classification algorithms with strong potential for acceleration in ASIC or FPGA, while the memory requirements are kept reasonably low.

Published
2011
Pages
157–162
Proceedings
Počítačové architektury a diagnostika
ISBN
978-80-227-3552-0
Publisher
Faculty of Electrical Engineering and Information Technology, Slovak University of Technology in Bratislava
Place
Stará Lesná
BibTeX
@inproceedings{BUT76363,
  author="Viktor {Puš}",
  title="Packet Classification Algorithms",
  booktitle="Počítačové architektury a diagnostika",
  year="2011",
  pages="157--162",
  publisher="Faculty of Electrical Engineering and Information Technology, Slovak University of Technology in Bratislava",
  address="Stará Lesná",
  isbn="978-80-227-3552-0"
}
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