Publication Details
Fast Translated Simulation of ASIPs
Křoustek Jakub, Ing., Ph.D.
Hruška Tomáš, prof. Ing., CSc. (DIFS)
Kolář Dušan, doc. Dr. Ing. (DIFS)
Hardware/sofware co-design, Translated simulation, Architecture description
language, Application-specific instruction set processors
Application-specific instruction set processors are the core of nowadays embedded
systems. Therefore, the designers need to have powerful tools for the processor
design. The tools should be generated automatically based on a processor
description. One of the most important tools is the simulator. It is used during
a testing phase of the processor design and during target software development.
The key feature of the simulator is its speed. The concept of a special
simulation type - translated simulation - is presented in this paper. This
simulation exploits information from a target C compiler. Both the simulator and
the C compiler are generated based on the processor description in an
architecture description language ISAC. Experimental results of this concept show
very good simulation speed and fast generation of the simulator.
@inproceedings{BUT35030,
author="Zdeněk {Přikryl} and Jakub {Křoustek} and Tomáš {Hruška} and Dušan {Kolář}",
title="Fast Translated Simulation of ASIPs",
booktitle="6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
year="2010",
pages="135--142",
publisher="Masaryk University",
address="Brno",
isbn="978-80-87342-10-7"
}