Publication Details

Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties

ŠKARVADA, J.; HERRMAN, T.; KOTÁSEK, Z. Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties. 10th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2007). Lübeck: IEEE Computer Society, 2007. p. 611-618. ISBN: 0-7695-2978-X.
Czech title
Analýza testovatelnosti založená na identifikaci Testovatelných Bloků s předdefinovanými vlastnostmi
Type
conference paper
Language
English
Authors
Škarvada Jaroslav, Ing., Ph.D.
Herrman Tomáš, Ing., Ph.D.
Kotásek Zdeněk, doc. Ing., CSc.
URL
Keywords

Testable block, power consumption estimation, test vectors generation, power consumption optimization

Abstract

In the paper, the methodology of testability analysis based on the concept of testable blocks is presented. In the methodology the power consumption during test application is also taken into account. For this purpose, power estimation tool was developed and implemented. Integration of the developed software into the Mentor Graphics design flow is described. Experimental results gained as a consequence of applying the methodology on both benchmark and practical designs are demonstrated. The intensions for future research are presented.

Published
2007
Pages
611–618
Proceedings
10th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2007)
ISBN
0-7695-2978-X
Publisher
IEEE Computer Society
Place
Lübeck
BibTeX 
@inproceedings{BUT28825,
  author="Jaroslav {Škarvada} and Tomáš {Herrman} and Zdeněk {Kotásek}",
  title="Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties",
  booktitle="10th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2007)",
  year="2007",
  pages="611--618",
  publisher="IEEE Computer Society",
  address="Lübeck",
  isbn="0-7695-2978-X",
  url="https://www.fit.vut.cz/research/publication/8414/"
}
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