Publication Details

An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs

VAŠÍČEK, Z.; SEKANINA, L. An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs. Proc. of 2007 International Conference on Field Programmable Logic and Applications. Los Alamitos: IEEE Computer Society, 2007. p. 216-221. ISBN: 1424410606.
Czech title
Cenově výhodná alternativa k adaptivnímu mediánovému filtru pro FPGA
Type
conference paper
Language
English
Authors
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY)
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY)
Keywords

image filter, FPGA, evolutionary design

Abstract

This paper presents a new approach to the FPGA implementation of image filters
which are utilized to remove the salt-and-pepper noise of high intensity (up to
70% of corrupted pixels). The proposed solution combines image filters designed
by means of evolutionary algorithm with a simple human-designed preprocessing and
post-processing unit. It provides the same filtering capability as a standard
adaptive median filter; however, using four times less Virtex slices.

Published
2007
Pages
216–221
Proceedings
Proc. of 2007 International Conference on Field Programmable Logic and Applications
Conference
The International Conference on Field Programmable Logic and Applications , Amsterodam, NL
ISBN
1424410606
Publisher
IEEE Computer Society
Place
Los Alamitos
BibTeX 
@inproceedings{BUT28818,
  author="Zdeněk {Vašíček} and Lukáš {Sekanina}",
  title="An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs",
  booktitle="Proc. of 2007 International Conference on Field Programmable Logic and Applications",
  year="2007",
  pages="216--221",
  publisher="IEEE Computer Society",
  address="Los Alamitos",
  isbn="1424410606",
  url="https://www.fit.vut.cz/research/publication/8398/"
}
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