Publication Details

Intrusion Detection System Intended for Multigigabit Networks

KOŘENEK, J.; KOBIERSKÝ, P. Intrusion Detection System Intended for Multigigabit Networks. 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems. Krakow: IEEE Computer Society, 2007. p. 361-364. ISBN: 978-1-4244-1161-0.
Czech title
Systém pro detekci narušení počítačové sítě určeny pro multigigabitové sítě
Type
conference paper
Language
English
Authors
Kořenek Jan, doc. Ing., Ph.D. (DCSY)
Kobierský Petr, Ing.
Keywords

Traffic Scanner, Snort, IDS, pattern matching

Abstract

Network intrusion detection systems (IDS) are becoming an important toolfor securing critical information and infrastructure. Currentsoftware-based IDS often fails to keep up with high-speed network links soa hardware based IDS is requested. This paper deals with design andimplementation of complete hardware accelerated IDS solution based onField-Programmable Gate Array (FPGA). Core generator for automatic mappingof IDS rules to FPGA logic was designed to assure fast packetclassification and high speed pattern matching. Proposed architecture hasbeen evaluated on a COMBO6X card with FPGA Virtex-II Pro. Using COMBO6Xcard theoretical throughput 6.4~Gbps was achieved for all Snort rules. Thedesigned system can be configured by rules described in Snort format usingweb interface.

Published
2007
Pages
361–364
Proceedings
2007 IEEE Design and Diagnostics of Electronic Circuits and Systems
Conference
The 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Krakow, PL
ISBN
978-1-4244-1161-0
Publisher
IEEE Computer Society
Place
Krakow
BibTeX 
@inproceedings{BUT28816,
  author="Jan {Kořenek} and Petr {Kobierský}",
  title="Intrusion Detection System Intended for Multigigabit Networks",
  booktitle="2007 IEEE Design and Diagnostics of Electronic Circuits and Systems",
  year="2007",
  pages="361--364",
  publisher="IEEE Computer Society",
  address="Krakow",
  isbn="978-1-4244-1161-0"
}
Back to top