Publication Details
Designing Approximate Arithmetic Circuits with Combined Error Constraints
Matyáš Jiří, Ing., Ph.D. (RG VERIFIT)
Mrázek Vojtěch, Ing., Ph.D. (DCSY)
Vojnar Tomáš, prof. Ing., Ph.D. (DITS)
approximate circuit, evolutionary design, error metrics
Approximate circuits trading the power consumption for the quality of results
play a key role in the development of energy-aware systems. Designing complex
approximate circuits is, however, a very difficult and computationally demanding
process. When deploying approximate circuits, various error metrics (e.g., mean
average error, worst-case error, error rate), as well as other constraints (e.g.,
correct multiplication by~0), have to be considered. The state-of-the-art
approximation methods typically focus on a single metric which significantly
limits the applicability of the resulting circuits. In this paper, we
experimentally investigate how various error metrics and their combinations
affect the reduction of the power consumption that can be achieved. To this end,
we extend evolutionary-driven techniques that allow us to effectively explore
the design space of the approximate circuits. We identify principal limitations
when complex error constraints are required as well as important correlations
among the error metrics enabling the construction of circuits providing the
best-known trade-offs between the power reduction and combined error
constraints.
@inproceedings{BUT178284,
author="Milan {Češka} and Jiří {Matyáš} and Vojtěch {Mrázek} and Tomáš {Vojnar}",
title="Designing Approximate Arithmetic Circuits with Combined Error Constraints",
booktitle="Proceeding of 25th Euromicro Conference on Digital System Design 2022 (DSD'22)",
year="2022",
pages="785--792",
publisher="Institute of Electrical and Electronics Engineers",
address="Gran Canaria",
doi="10.1109/DSD57027.2022.00110",
isbn="978-1-6654-7404-7"
}