Publication Details
New Methods for Synthesis and Approximation of Logic Circuits
VAŠÍČEK, Z. New Methods for Synthesis and Approximation of Logic Circuits. Brno: 2016. p. 0-0.
Type
habilitation thesis
Language
English
Authors
Published
2016
Pages
194
Place
Brno
BibTeX
@misc{BUT168627,
author="Zdeněk {Vašíček}",
title="New Methods for Synthesis and Approximation of Logic Circuits",
year="2016",
pages="194",
address="Brno",
url="https://www.fit.vut.cz/research/publication/11742/",
note="habilitation thesis"
}