Publication Details

Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits

KOCNOVÁ, J.; VAŠÍČEK, Z. Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits. In GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2019. p. 377-378. ISBN: 978-1-4503-6748-6.
Czech title
Vliv výběru podobvodů na efektivitu optimalizace obvodů na úrovni hradel založené na CGP
Type
conference paper
Language
English
Authors
Keywords

Cartesian Genetic Programming, Logic Synthesis, CombinationalCircuits

Abstract

Various EA-based methods have been applied to design and optimize logic circuits since the early nineties. The unconventional methods, however, typically suffer from various scalability issues preventing them to be adopted in practice. Recent improvement in the fitness computation procedure connected with the introduction of formal methods in the fitness evaluation such as SAT solvers or BDDs enabled pushing of the limits forward and approaching the complexity of industrial problems. It was demonstrated that EAs can be applied to optimize gate-level circuits consisting of thousands of gates without introducing any decomposition technique. Despite that, the efficiency decreases with increasing the circuit complexity. This problem can be managed by adopting the concept of the so-called iterative resynthesis based on the extraction of smaller sub-circuits from a complex circuit, their local optimization followed by the implantation back to the original circuit. Recently, a method based on the computation of so-called cuts was proposed. In this paper, we propose an alternative approach which is able to select more complex sub-graphs consisting of more nodes and more inputs. Compared to the previous method, the proposed approach allows to improve the efficiency of the optimization. More than 9% and 20% reduction was observed on the highly optimized logic and arithmetic circuits, respectively.

Published
2019
Pages
377–378
Proceedings
GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion
ISBN
978-1-4503-6748-6
Publisher
Association for Computing Machinery
Place
New York
DOI
UT WoS
000538328100188
EID Scopus
BibTeX
@inproceedings{BUT158075,
  author="Jitka {Kocnová} and Zdeněk {Vašíček}",
  title="Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits",
  booktitle="GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion",
  year="2019",
  pages="377--378",
  publisher="Association for Computing Machinery",
  address="New York",
  doi="10.1145/3319619.3321926",
  isbn="978-1-4503-6748-6",
  url="https://www.fit.vut.cz/research/publication/11921/"
}
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