Publication Details

Evolutionary Approach to Approximate Digital Circuits Design

VAŠÍČEK, Z.; SEKANINA, L. Evolutionary Approach to Approximate Digital Circuits Design. IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION, 2015, vol. 19, no. 3, p. 432-444. ISSN: 1089-778X.
Czech title
Evoluční přístup k návrhu aproximačních číslicových obvodů
Type
journal article
Language
English
Authors
URL
Keywords

Approximate computing, Cartesian genetic programming, digital circuits,
population seeding

Abstract


In approximate computing, the requirement of perfect functional behavior can be
relaxed because some applications are inherently error resilient. Approximate
circuits, which fall into the approximate computing paradigm, are designed in
such a way that they do not fully implement the logic behavior given by the
specification and hence their accuracy can be exchanged for lower area, delay or
power consumption.  In order to automate the design process, we propose to evolve
approximate digital circuits which show a minimal error for a supplied amount of
resources. The design process which is based on Cartesian Genetic Programming
(CGP) can be repeated many times in order to obtain various tradeoffs between the
accuracy and area. A heuristic seeding mechanism is introduced to CGP which
allows for  improving not only the quality of evolved circuits, but also reducing
the time of evolution. The efficiency of the proposed method is evaluated for the
gate as well as the functional level evolution. In particular, approximate
multipliers and median circuits which show very good parameters in comparison
with other available implementations were constructed by means of the proposed
method. 

Published
2015
Pages
432–444
Journal
IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION, vol. 19, no. 3, ISSN 1089-778X
DOI
UT WoS
000356517700009
EID Scopus
BibTeX
@article{BUT119783,
  author="Zdeněk {Vašíček} and Lukáš {Sekanina}",
  title="Evolutionary Approach to Approximate Digital Circuits Design",
  journal="IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION",
  year="2015",
  volume="19",
  number="3",
  pages="432--444",
  doi="10.1109/TEVC.2014.2336175",
  issn="1089-778X",
  url="https://www.fit.vut.cz/research/publication/10406/"
}
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