Publication Details

Memory Efficient IP Lookup in 100 Gbps Networks

MATOUŠEK, J.; SKAČAN, M.; KOŘENEK, J. Memory Efficient IP Lookup in 100 Gbps Networks. In 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings. Porto: IEEE Circuits and Systems Society, 2013. p. 1-8. ISBN: 978-1-4799-0004-6.
Czech title
Paměťově efektivní vyhledávání v IP směrovacích tabulkách ve 100 Gb/s sítích
Type
conference paper
Language
English
Authors
Keywords

IP address, Longest Prefix Match, Memory Demands, Forwarding Table

Abstract

The increasing number of devices connected to the Internet together with video on demand have a direct impact to the speed of network links and performance of core routers. To achieve 100 Gbps throughput, core routers have to implement IP lookup in dedicated hardware and represent a forwarding table using a data structure, which fits into the onchip memory. Current IP lookup algorithms have high memory demands when representing IPv6 prefix sets or introduce very high pre-processing overhead. Therefore, we performed analysis of IPv4 and IPv6 prefixes in forwarding tables and propose a novel memory representation of IP prefix sets, which has very low memory demands. The proposed representation has better memory utilization in comparison to the highly optimized Shape Shifting Trie (SST) algorithm and it is also suitable for IP lookup in 100 Gbps networks, which is shown on a new pipelined hardware architecture with 170 Gbps throughput.

Published
2013
Pages
1–8
Proceedings
2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
ISBN
978-1-4799-0004-6
Publisher
IEEE Circuits and Systems Society
Place
Porto
DOI
UT WoS
000349452600026
EID Scopus
BibTeX
@inproceedings{BUT103421,
  author="Jiří {Matoušek} and Martin {Skačan} and Jan {Kořenek}",
  title="Memory Efficient IP Lookup in 100 Gbps Networks",
  booktitle="2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings",
  year="2013",
  pages="1--8",
  publisher="IEEE Circuits and Systems Society",
  address="Porto",
  doi="10.1109/FPL.2013.6645519",
  isbn="978-1-4799-0004-6",
  url="https://www.fit.vut.cz/research/publication/10310/"
}
Back to top