Project Details

Jazyk a vývojové prostředí pro návrh mikroprocesoru

Project Period: 1. 1. 2006 – 30. 6. 2010

Project Type: grant

Code: FT-TA3/128

Agency: Ministerstvo průmyslu a obchodu ČR

Program: TANDEM

English title
Language and development environment for microprocessor design
Type
grant
Keywords

HW/SW co-design, embedded system, mikroprocessor, SoC, ASIP, ISAC

Abstract

The project Language and development environment for microprocessor design is focused on the research of the language for description of microprocessor and methods for transformation of microprocessor’s model.

These methods will be used for design of support software tools which would make the development more efficient and in some aspects fully automatized. The goal is to create language and software environment which make complete development of microprocessor in most efficient way and shortest time possible. The support of creating of the microprocessor’s model using developing graphical tool is connected with this task.

Team members
Kurečka Radomír, Ing. (FEKT) – research leader
Hruška Tomáš, prof. Ing., CSc. (DIFS)
Masařík Karel, Ing., Ph.D. (CM-SDE)
Publications

2011

  • PŘIKRYL, Z. Advanced Methods of Microprocessor Simulation. Information Sciences and Technologies Bulletin of the ACM Slovakia, 2011, vol. 3, no. 3, p. 1-13. ISSN: 1338-1237. Detail

2010

  • HUSÁR, A.; HRUŠKA, T.; MASAŘÍK, K.; PŘIKRYL, Z. Instruction Pipeline Modeling using Petri Nets. Proceedings of the International Workshop on Petri Nets and Software Engineering - PNSE'10. Proceedings of the International Workshop on Petri Nets and Software. Universität Hamburg: Technical Universityt Hamburg-Harburg, 2010. p. 163-164. ISBN: 978-972-8692-55-1. Detail
  • HUSÁR, A.; HRUŠKA, T.; TRMAČ, M.; PŘIKRYL, Z. Instruction Selection Patterns Extraction from Architecture Specification Language ISAC. Proceedings of the 16th Conference Student EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010. p. 166-170. ISBN: 978-80-214-4080-7. Detail
  • KŘOUSTEK, J.; ŽIDEK, S. Generating Proper VLIW Assembler Code Using Scattered Context Grammars. Proceedings of the 16th Conference Student EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010. p. 181-185. ISBN: 978-80-214-4080-7. Detail
  • KŘOUSTEK, J.; ŽIDEK, S.; KOLÁŘ, D.; MEDUNA, A. Exploitation of Scattered Context Grammars to Model VLIW Instruction Constraints. In Proceedings of the 12th Biennial Baltic Electronics Conference. Tallinn: Institute of Electrical and Electronics Engineers, 2010. p. 165-168. ISBN: 978-1-4244-7357-1. Detail

2009

  • HUSÁR, A.; PŘIKRYL, Z.; MASAŘÍK, K.; HRUŠKA, T. ASIP Design using Architecture Description Language ISAC. ACACES 2009 - Poster Abstracts. Ghent: High Performance and Embedded Architecture and Compilation, 2009. p. 137-139. ISBN: 978-90-382-1467-2. Detail
  • KŘOUSTEK, J. Usage of Decompilation in Processor Architecture Modeling. Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems. Ostrava: 2009. p. 64-67. ISBN: 978-80-86840-47-5. Detail
  • PŘIKRYL, Z.; HRUŠKA, T. Cycle Accurate Profiler for ASIPs. 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2009. p. 168-175. ISBN: 978-80-87342-04-6. Detail
  • PŘIKRYL, Z.; MASAŘÍK, K.; HRUŠKA, T.; HUSÁR, A. Fast Cycle-Accurate Interpreted Simulation. Tenth International Workshop on Microprocessor Test and Verification: Common Challenges and Solutions. Austin: IEEE Computer Society Press, 2009. p. 9-14. ISBN: 978-0-7695-4000-9. Detail

2008

  • HRUŠKA, T.; KOLÁŘ, D.; LUKÁŠ, R.; ZÁMEČNÍKOVÁ, E. Two-Way Coupled Finite Automaton and Its Usage in Translators. New Aspects of Circuits. WSEAS Applied Informatics & Communications. Heraklion: World Scientific and Engineering Academy, 2008. p. 445-449. ISBN: 978-960-6766-82-4. ISSN: 1790-5117. Detail
  • MASAŘÍK, K. Systém pro souběžný návrh technického a programového vybavení počítačů. VUTIUM. VUTIUM. Brno: Fakulta informačních technologií VUT v Brně, 2008. 156 s. ISBN: 978-80-214-3863-7. Detail
  • PŘIKRYL, Z.; HRUŠKA, T.; MASAŘÍK, K. Simulation of ASIP on SoC. New Aspects of Systems. WSEAS Transactions on Systems. Heraklion: World Scientific and Engineering Academy, 2008. p. 192-197. ISBN: 978-960-6766-83-1. ISSN: 1790-2769. Detail
  • PŘIKRYL, Z.; HRUŠKA, T.; MASAŘÍK, K. Distributed Simulation and Profiling of Multiprocessor Systems on a Chip. WSEAS Transactions on Circuits, 2008, vol. 7, no. 8, p. 788-799. ISSN: 1109-2734. Detail

2007

  • KŘOUSTEK, J. Analýza a transformace kódů. Proceedings of the 13th Conference STUDENT EEICT 2007. Brno: Vysoké učení technické v Brně, 2007. s. 152-154. ISBN: 978-80-214-3407-3. Detail
  • MASAŘÍK, K.; HRUŠKA, T. Structural Equivalence between Architectural Descriptive and Hardware Languages. A proceedings volume from the 4th International Conference on Cybernetics and Information Technologies, Systems and Applications CITSA 2007. Florida: International Institute of Informacs and Systemics, 2007. p. 40-45. ISBN: 1-934272-10-8. Detail

2006

  • MASAŘÍK, K.; HRUŠKA, T. UML as Architecture Description Language. MOSIS'06, Proceedings of 40th Conference "Modelling and Simulation of Systems". Ostrava: 2006. p. 41-48. ISBN: 80-86840-21-2. Detail
  • MASAŘÍK, K.; HRUŠKA, T. UML IN DESIGN OF ASIP. A proceedings volume from the 3rd IFAC Workshop on Discrete-Event System Design DESDes'06. Zielona Gora: University of Zielona Gora, 2006. p. 209-214. ISBN: 83-7481-035-1. Detail
  • MASAŘÍK, K.; HRUŠKA, T.; KOLÁŘ, D. Language and Development Environment For Microprocessor Design Of Embedded Systems. Proceedings of IFAC Workshop on PROGRAMMABLE DEVICES and EMBEDDED SYSTEMS PDeS 2006. Brno: Faculty of Electrical Engineering and Communication BUT, 2006. p. 120-125. ISBN: 80-214-3130-X. Detail
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