Project Details
Evoluční postupy pro zvýšení testovatelnosti číslicových obvodů
Project Period: 1. 1. 2002 – 31. 12. 2002
Project Type: grant
Code: FR1754/2002/G1
controllability, observability, testability, testability analysis, evolution approach, design for test, scan, test point insertion technique
With increasing digital circuits complexity and reducing the time-to-value and time-to-market values, efforts are growing how to at very short time and certainly test if a produced die does a function it was designed for. Thus, automated techniques evaluating digital circuit testability measures exist. These techniques are able to detect difficult-to-test nodes and to suggest the proper digital circuit structure modification leading to digital circuit testability enhancement. In the frame of our project, these so called testability analysis and enhancement techniques are based on evolutionary approaches and they can be characterized especially by their fast convergence to the searched solution - in our case to optimal (with respect to designer's claims) digital circuit testability.
Kotásek Zdeněk, doc. Ing., CSc.
2002
- STRNADEL, J. Normalized Testability Measures Based on RTL Digital Circuit Graph Model Analysis. Proceedings of The fifth International Scientific Conference Electronic Computers and Informatics 2002. Edition 55. Košice: The University of Technology Košice, 2002.
p. 200-205. ISBN: 80-7099-879-2. Detail