intMAN: Priority-Driven Load-Adaptive Monitoring-Based Hardware for Managing Interrupts in Embedded Event-Triggered Real-Time Systems

intMAN: Prioritně řízený a na monitorování a adaptaci na zatížení založený hardware pro správu přerušení ve vestavných událostmi řízených systémech reálného času

prototype

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Strnadel Josef, Ing., Ph.D. (DCSY)
Šimek Václav, Ing. (DCSY)

task, scheduling, real time, system, embedded, load, monitoring, interrupt
management, excessive interrupt rate, overload prevention, FPGA, Xilinx,
Spartan-6, VHDL

Prototype of a hardware unit for preventing real-time systems from overloads
caused by excessive interrupt rates. Novelty of the hardware can be seen in the
fact it is able to adapt interrupt service rate to the RT system load and to the
actual priority assignment policy. The load is monitored on basis of special
low-overhead signals produced by the system for this purpose. The hardware is
designed to analyze all interrupt stimuli and decide whether they should be
forwarded do the system or temporarily deferred. The hardware is ready to buffer
interrupt requests until the system is underloaded or running an activity having
lower priority comparing to the interrupt. Design of the hardware was described
in VHDL and synthesized into FPGA devices from the Xilinx Spartan-6 family.

Ústav počítačových systémů, Fakulta informačních technologií Vysokého učení technického v Brně, Božetěchova 2, 612 66 Brno

• JPG Experimentální platforma 761 kB
• pdf Schéma zapojení 353 kB
• zip VHDL - zdrojové texty a dokumentace 4 MB
• JPG Platforma - stackup.JPG 599 kB

Advanced secured, reliable and adaptive IT, BUT, Vnitřní projekty VUT, FIT-S-11-1, start: 2011-01-01, end: 2013-12-31, completed
National Support for Project Reduced Certification Costs Using Trusted Multi-core Platforms, MŠMT, Společné technologické iniciativy, 7H10013, start: 2010-04-01, end: 2013-03-31, running
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
The IT4Innovations Centre of Excellence, MŠMT, Operační program Výzkum a vývoj pro inovace, ED1.1.00/02.0070, start: 2011-01-01, end: 2015-12-31, completed

Dependable Digital Systems Research Group (RG DEPSYS)

Department of Computer Systems (DCSY)