Ing.
Marcela Zachariášová
Ph.D.
Assistant professor
Publications
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2023
BARDONEK, P.; ZACHARIÁŠOVÁ, M. Control Flow Analysis for Bottom-up Portable Models Creation. DVCon Europe 2023; Design and Verification Conference and Exhibition Europe. Mnichov: VDE VERLAG, 2023.
p. 65-70. ISBN: 978-3-8007-6205-7. Detail -
2020
BARDONEK, P.; ZACHARIÁŠOVÁ, M. Using Control Logic Drivers for Automated Generation of System-level Portable Models. In 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020. Novi Sad: Institute of Electrical and Electronics Engineers, 2020.
p. 1-4. ISBN: 978-1-7281-9938-2. Detail -
2017
FAJČÍK, M.; SMRŽ, P.; ZACHARIÁŠOVÁ, M. Automation of Processor Verification Using Recurrent Neural Networks. In 18th International Workshop on Microprocessor and SOC Test, Security and Verification (MTV). Austin, Texas: Institute of Electrical and Electronics Engineers, 2017.
p. 15-20. ISBN: 978-1-5386-3351-9. DetailPODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; ZACHARIÁŠOVÁ, M.; KRČMA, M.; KOTÁSEK, Z. Functional Verification Based Platform for Evaluating Fault Tolerance Properties. Microprocessors and Microsystems, 2017, vol. 52, no. 5,
p. 145-159. ISSN: 0141-9331. Detail -
2016
ZACHARIÁŠOVÁ, M.; KEKELYOVÁ, M.; KOTÁSEK, Z. Regression Test Suites Optimization for Application-specific Instruction-set Processors and Their Use for Dependability Analysis. In Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol Cyprus: IEEE Computer Society, 2016.
p. 380-387. ISBN: 978-1-5090-2816-0. Detail -
2015
ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Universal Pseudo-random Generation of Assembler Codes for Processors. Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015.
p. 70-73. DetailKEKELYOVÁ, M.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z.; HRUŠKA, T. Application of Evolutionary Algorithms for Optimization of Regression Suites. In IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015.
p. 91-94. ISBN: 978-1-4799-6779-7. DetailPODIVÍNSKÝ, J.; ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. Microprocessors and Microsystems, 2015, vol. 39, no. 8,
p. 1215-1230. ISSN: 0141-9331. DetailPODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; ČEKAN, O.; KOTÁSEK, Z. FPGA Prototyping and Accelerated Verification of ASIPs. In IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015.
p. 145-148. ISBN: 978-1-4799-6780-3. DetailPODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Radiation Impact on Mechanical Application Driven by FPGA-based Controller. Proceedings of The Fourth Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015.
p. 13-16. DetailZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Automation and Optimization of Coverage-driven Verification. In Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015.
p. 87-94. ISBN: 978-1-4673-8035-5. Detail -
2014
ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Solving of Constraint Satisfaction Problem. Proceedings of the 20th Conference STUDENT EEICT 2014. Volume 3. Brno: Faculty of Information Technology BUT, 2014.
p. 291-295. ISBN: 978-80-214-4924-4. DetailPODIVÍNSKÝ, J.; ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. In 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014.
p. 312-319. ISBN: 978-1-4799-5793-4. DetailPODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Complex Control System for Testing Fault-Tolerance Methodologies. Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Dresden: COST, European Cooperation in Science and Technology, 2014.
p. 24-27. ISBN: 978-2-11-129175-1. DetailZACHARIÁŠOVÁ, M. Application of Evolutionary Computing for Optimization of Functional Verification. Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014.
p. 135-140. ISBN: 978-80-7494-027-9. Detail -
2013
ZACHARIÁŠOVÁ, M. New Methods for Increasing Efficiency and Speed of Functional Verification. Počítačové architektury a diagnostika PAD 2013. Plzeň: University of West Bohemia in Pilsen, 2013.
p. 111-116. ISBN: 978-80-261-0270-0. DetailZACHARIÁŠOVÁ, M.; BOLCHINI, C.; KOTÁSEK, Z. Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability. IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Karlovy Vary: IEEE Computer Society, 2013.
p. 275-278. ISBN: 978-1-4673-6133-0. DetailZACHARIÁŠOVÁ, M.; BOLCHINI, C.; KOTÁSEK, Z. Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability. Proceedings of The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Avignon: COST, European Cooperation in Science and Technology, 2013.
p. 35-38. ISBN: 978-2-11-129175-1. DetailZACHARIÁŠOVÁ, M.; PŘIKRYL, Z.; HRUŠKA, T.; KOTÁSEK, Z. Automated Functional Verification of Application Specific Instruction-set Processors. IFIP Advances in Information and Communication Technology, 2013, vol. 4, no. 403,
p. 128-138. ISSN: 1868-4238. Detail -
2012
ZACHARIÁŠOVÁ, M. Acceleration of Functional Verification in the Development Cycle of Hardware Systems. Počítačové architektury a diagnostika. Praha: Czech Technical University, 2012.
p. 73-78. ISBN: 978-80-01-05106-1. DetailZACHARIÁŠOVÁ, M.; LENGÁL, O.; KAJAN, M. HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware. Lecture Notes in Computer Science, 2012, vol. 2012, no. 7261,
p. 247-253. ISSN: 0302-9743. Detail -
2011
ZACHARIÁŠOVÁ, M. Hardware Accelerated Functional Verification - Framework for FPGA-Accelerated Functional Verification. Saarbrucken: Lambert Academic Publishing, 2011. 60 p. ISBN: 978-3-8465-5913-0. Detail
ZACHARIÁŠOVÁ, M. Hardware Accelerated Functional Verification. Proceedings of the 17th Conference STUDENT EEICT 2011. Brno: Faculty of Information Technology BUT, 2011.
p. 321-323. ISBN: 978-80-214-4272-6. Detail