Richard Růžička

Publications

• 2023

  RŮŽIČKA, R.; ŠIMEK, V.; NEVORAL, J. Polymorphic RTL Computational Elements. Proceedings of the DSD 2023. Durres: IEEE Computer Society, 2023. p. 523-530. ISBN: 979-8-3503-4419-6. Detail

• 2022

  RŮŽIČKA, R.; ŠIMEK, V. Technology Mapping for PAIG Optimized Polymorphic Circuits. In Proceeding of 25th Euromicro Conference on Digital System Design 2022 (DSD'22). Gran Canaria: IEEE Computer Society, 2022. p. 801-808. ISBN: 978-1-6654-7404-7. Detail

• 2020

  CRHA, A.; ŠIMEK, V.; RŮŽIČKA, R. Multi-output cuts influence on optimization of polymorphic circuits based on PAIG rewriting. In 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Novi Sad: Institute of Electrical and Electronics Engineers, 2020. p. 1-6. ISBN: 978-1-7281-9938-2. Detail

  NEVORAL, J.; ŠIMEK, V.; RŮŽIČKA, R. Power Consumption Analysis of New Generation of Polymorphic Gates. In 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020. Novi Sad: Institute of Electrical and Electronics Engineers, 2020. p. 1-6. ISBN: 978-1-7281-9938-2. Detail

• 2019

  CRHA, A.; ŠIMEK, V.; RŮŽIČKA, R. PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis. In 22nd Euromicro Conference on Digital System Design. Kallithea, Chalkidiki: Institute of Electrical and Electronics Engineers, 2019. p. 335-342. ISBN: 978-1-7281-2861-0. Detail

  NEVORAL, J.; RŮŽIČKA, R. Multifunctionality matters: Towards better implementation of reconfigurable computational elements. 2019. p. 0-0. Detail

  NEVORAL, J.; ŠIMEK, V.; RŮŽIČKA, R. PoLibSi: Path Towards Intrinsically Reconfigurable Components. In 2019 22nd Euromicro Conference on Digital System Design (DSD). Kallithea, Chalkidiki: Institute of Electrical and Electronics Engineers, 2019. p. 328-334. ISBN: 978-1-7281-2861-0. Detail

• 2018

  CRHA, A.; ŠIMEK, V.; RŮŽIČKA, R. Towards novel format for representation of polymorphic circuits. In 13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Taormina: IEEE Circuits and Systems Society, 2018. p. 1-2. ISBN: 978-1-5386-5290-9. Detail

  NEVORAL, J.; RŮŽIČKA, R. Efficient Implementation of Bi-functional RTL Components - Case Study. In 2018 New Generation of CAS (NGCAS). Valletta: IEEE Circuits and Systems Society, 2018. p. 25-28. ISBN: 978-1-5386-7680-6. Detail

  NEVORAL, J.; RŮŽIČKA, R.; ŠIMEK, V. CMOS Gates with Second Function. In 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). Hong Kong: IEEE Computer Society, 2018. p. 82-87. ISBN: 978-1-5386-7099-6. Detail

  NEVORAL, J.; RŮŽIČKA, R.; ŠIMEK, V. From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs. In 2018 21st Euromicro Conference on Digital System Design. Praha: Institute of Electrical and Electronics Engineers, 2018. p. 657-664. ISBN: 978-1-5386-7376-8. Detail

• 2017

  CRHA, A.; ŠIMEK, V.; RŮŽIČKA, R. Synthesis tool for design of complex polymorphic circuits. In 2017 12th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Palma de Mallorca: IEEE Circuits and Systems Society, 2017. p. 149-154. ISBN: 978-1-5090-6376-5. Detail

  NEVORAL, J.; ŠIMEK, V.; RŮŽIČKA, R. Compact Library of Efficient Polymorphic Gates based on Ambipolar Transistors. In 2017 12th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Palma de Mallorca: IEEE Circuits and Systems Society, 2017. p. 155-160. ISBN: 978-1-5090-6376-5. Detail

  ŠIMEK, V.; NEVORAL, J.; CRHA, A.; RŮŽIČKA, R. Towards Design Flow for Space-Efficient Implementation of Polymorphic Circuits Based on Ambipolar Components. ElectroScope - http://www.electroscope.zcu.cz, 2017, vol. 11, no. 1, p. 1-10. ISSN: 1802-4564. Detail

• 2016

  CRHA, A.; RŮŽIČKA, R.; ŠIMEK, V. Novel Approach to Synthesis of Logic Circuits Based on Multifunctional Components. Journal of Electrical Engineering, 2016, vol. 67, no. 1, p. 29-35. ISSN: 1339-309X. Detail

  NEVORAL, J.; RŮŽIČKA, R.; MRÁZEK, V. Evolutionary Design of Polymorphic Gates Using Ambipolar Transistors. In 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016. p. 1-8. ISBN: 978-1-5090-4240-1. Detail

  RŮŽIČKA, R.; TESAŘ, R. Lets Move Polymorphism Downwards: On the Multifunctional Logic Based on Ambipolar Behaviour of Semiconductor Devices. In Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era. Istanbul: Istanbul Sehir University, 2016. p. 275-279. ISBN: 978-1-5090-0335-8. Detail

  ŠIMEK, V.; STŘÍTESKÝ, S.; ŘEZNÍČEK, M.; CRHA, A.; RŮŽIČKA, R. Towards Implementation of Logic Circuits Based on Intrinsically Reconfigurable Organic Transistors. In Proceedings of the 6th Electronics System-Integration Technology Conference. Grenoble: Institute of Electrical and Electronics Engineers, 2016. p. 1-6. ISBN: 978-1-5090-1401-9. Detail

  ŠIMEK, V.; TESAŘ, R.; RŮŽIČKA, R.; CRHA, A. Modelling and Physical Implementation of Ambipolar Components Based on Organic Materials. In Proceedings of the 28th International Conference on Microelectronics (ICM 2016). Cairo: IEEE Circuits and Systems Society, 2016. p. 341-344. ISBN: 978-1-5090-5721-4. Detail

  TESAŘ, R.; ŠIMEK, V.; RŮŽIČKA, R.; CRHA, A. Implementation of Polymorphic Operators for Efficient Synthesis of Multifunctional Circuits. Journal of Computer and Communications, 2016, vol. 4, no. 15, p. 151-159. ISSN: 2327-5227. Detail

• 2015

  CRHA, A.; RŮŽIČKA, R.; ŠIMEK, V. On the Synthesis of Multifunctional Logic Circuits. Abstracts Proceedings of International FLASH Conference. Brno: Faculty of Electrical Engineering and Communication BUT, 2015. p. 52-53. ISBN: 978-80-214-5270-1. Detail

  CRHA, A.; RŮŽIČKA, R.; ŠIMEK, V. Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates. In Proceedings on UKSim-AMSS 17th International Conference on Computer Modelling ans Simulation. Cambridge: IEEE Computer Society, 2015. p. 612-617. ISBN: 978-1-4799-8713-9. Detail

  ŘEZNÍČEK, M.; BURŠÍK, M.; JANKOVSKÝ, J.; ŠIMEK, V.; RŮŽIČKA, R. Temperature Stabilized Chip Expander. In Proceedings on 20th European Microelectronics and Packaging Conference & Exhibition. Friedrichshafen: IMAPS-Deutschland e.V., 2015. p. 1-6. ISBN: 978-0-9568086-1-5. Detail

  ŠIMEK, V.; RŮŽIČKA, R.; CRHA, A. Toward Efficient Synthesis Method of Multifunctional Logic Circuits. In Proceedings of the 27th International Conference on Microelectronics (ICM 2015). Casablanca: IEEE Computer Society, 2015. p. 21-24. ISBN: 978-1-4673-8759-0. Detail

  ŠIMEK, V.; RŮŽIČKA, R.; CRHA, A.; ŘEZNÍČEK, M.; BURŠÍK, M. Reconfigurable Digital Circuits Based on Chip Expander with Integrated Temperature Regulation. Journal of Computer and Communications, 2015, vol. 3, no. 11, p. 169-175. ISSN: 2327-5227. Detail

• 2014

  ŠIMEK, V.; RŮŽIČKA, R. Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature. In Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation. Pisa: IEEE Computer Society, 2014. p. 501-506. ISBN: 978-1-4799-7411-5. Detail

  ŠIMEK, V.; RŮŽIČKA, R.; CRHA, A.; TESAŘ, R. Implementation of a Cellular Automaton with Globally Switchable Rules. In 11th International Conference on Cellular Automata for Research and Industry, ACRI 2014. Lecture Notes in Computer Science. Cham: Springer Science+Business Media B.V., 2014. p. 378-387. ISBN: 978-3-319-11519-1. Detail

  TESAŘ, R.; RŮŽIČKA, R.; ŠIMEK, V. Resistant Gates for Polymorphic Electronics. In Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation. Pisa: IEEE Computer Society, 2014. p. 513-518. ISBN: 978-1-4799-7412-2. Detail

  TESAŘ, R.; ŠIMEK, V.; RŮŽIČKA, R.; CRHA, A. Polymorphic Electronics Based on Ambipolar OFETs. EDS 2014 IMAPS CS International Conference Proceedings. Brno: Brno University of Technology, 2014. p. 106-111. ISBN: 978-80-214-4985-5. Detail

• 2013

  RŮŽIČKA, R.; ŠIMEK, V. More Complex Polymorphic Circuits: A Way to Implementation of Smart Dependable Systems. ElectroScope - http://www.electroscope.zcu.cz, 2013, vol. 7, no. 5, p. 1-6. ISSN: 1802-4564. Detail

  SEKANINA, L.; RŮŽIČKA, R.; VAŠÍČEK, Z.; ŠIMEK, V.; HANÁČEK, P. Implementing a Unique Chip ID on a Reconfigurable Polymorphic Circuit. Information Technology and Control, 2013, vol. 42, no. 1, p. 7-14. ISSN: 1392-124X. Detail

  ŠIMEK, V.; RŮŽIČKA, R. More Complex Polymorphic Circuits and Their Physical Implementation. Proceedings of the 20th Electronic Devices and Systems IMAPS CS International Conference. Brno: Brno University of Technology, 2013. p. 189-194. ISBN: 978-80-214-4754-7. Detail

• 2012

  RŮŽIČKA, R.; ŠIMEK, V. NAND/NOR Gate Polymorphism in Low Temperature Environment. Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Tallinn: Institute of Electrical and Electronics Engineers, 2012. p. 34-37. ISBN: 978-1-4673-1185-4. Detail

  RŮŽIČKA, R.; ŠIMEK, V. Polymeric Polymorphic Electronics: Towards Multifunctional Logic Elements Based on Organic Semiconductor Materials. Proceedings of CSE 2012 International Scientific Conference on Computer Science and Engineerig. Košice: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2012. p. 154-161. ISBN: 978-80-8143-049-7. Detail

• 2011

  RŮŽIČKA, R.; ŠIMEK, V. Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. Proceedings of 14th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society Press, 2011. p. 205-212. ISBN: 978-0-7695-4494-6. Detail

  RŮŽIČKA, R.; ŠIMEK, V. On Properties of Basic Building Blocks for Printable Polymer and Nanometal Logic. Proc. of IMAPS CS International Conference on Electronic Devices and Systems. Brno: Brno University of Technology, 2011. p. 258-263. ISBN: 978-80-214-4303-7. Detail

  RŮŽIČKA, R.; ŠIMEK, V.; SEKANINA, L. Behavior of CMOS Polymorphic Circuits in High Temperature Environment. Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Cottbus: IEEE Computer Society, 2011. p. 447-452. ISBN: 978-1-4244-9753-9. Detail

• 2010

  RŮŽIČKA, R. Gracefully Degrading Circuit Controllers Based on Polytronics. Proc. of 13th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2010. p. 809-812. ISBN: 978-0-7695-4171-6. Detail

  RŮŽIČKA, R. On Practical Aspects of Printable Polymer and Nanometal Logic. Proceedings of CSE2010 - International Scientific Conference on Computer Science and Engineering. Košice: The University of Technology Košice, 2010. p. 202-207. ISBN: 978-80-8086-164-3. Detail

  ŠIMEK, V.; RŮŽIČKA, R.; SEKANINA, L. On Analysis of Fabricated Polymorphic Circuits. Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Vienna: IEEE Computer Society, 2010. p. 281-284. ISBN: 978-1-4244-6610-8. Detail

• 2009

  RŮŽIČKA, R. Dependable Controller Design using Polymorphic Counters. Proc. of 12th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2009. p. 355-362. ISBN: 978-0-7695-3782-5. Detail

  SEKANINA, L.; RŮŽIČKA, R.; GAJDA, Z. Polymorphic FIR Filters with Backup Mode Enabling Power Savings. Proc. of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems. Los Alamitos: IEEE Computer Society, 2009. p. 43-50. ISBN: 978-0-7695-3714-6. Detail

  SEKANINA, L.; RŮŽIČKA, R.; VAŠÍČEK, Z.; PROKOP, R.; FUJCIK, L. REPOMO32 - New Reconfigurable Polymorphic Integrated Circuit for Adaptive Hardware. Proc. of the 2009 IEEE Symposium Series on Computational Intelligence - Workshop on Evolvable and Adaptive Hardware. Nashville: IEEE Computational Intelligence Society, 2009. p. 39-46. ISBN: 978-1-4244-2755-0. Detail

  SEKANINA, L.; VAŠÍČEK, Z.; RŮŽIČKA, R.; BIDLO, M.; JAROŠ, J.; ŠVENDA, P. Evoluční hardware: Od automatického generování patentovatelných invencí k sebemodifikujícím se strojům. Edice Gerstner. Edice Gerstner. Praha: Nakladatelství Academia, 2009. 328 s. ISBN: 978-80-200-1729-1. Detail

  STRNADEL, J.; RŮŽIČKA, R. Testability Analysis Driven Data Path Modification And Controller Synthesis. Proceedings of 16th Electronic Devices and Systems IMAPS CS International Conference. Brno: Brno University of Technology, 2009. p. 363-368. ISBN: 978-80-214-3933-7. Detail

• 2008

  RŮŽIČKA, R. On Bifunctional Polymorphic Gates Controlled by a Special Signal. WSEAS Transactions on Circuits, 2008, vol. 7, no. 3, p. 96-101. ISSN: 1109-2734. Detail

  RŮŽIČKA, R.; PROKOP, R. Bifunctional NAND/NOR Gates as Building Blocks for Polytronics. Proceedings of CSE 2008. Stará Lesná: The University of Technology Košice, 2008. p. 200-207. ISBN: 978-80-8086-092-9. Detail

  RŮŽIČKA, R.; SEKANINA, L.; PROKOP, R. Physical Demonstration of Polymorphic Self-checking Circuits. Proc. of the 14th IEEE Int. On-Line Testing Symposium. Los Alamitos: IEEE Computer Society, 2008. p. 31-36. ISBN: 978-0-7695-3264-6. Detail

• 2007

  RŮŽIČKA, R. Podpora návrhu pro snadnou testovatelnost číslicových obvodů popsaných na úrovni meziregistrových přenosů. Brno: Fakulta informačních technologií VUT v Brně, 2007. 130 s. ISBN: 978-80-214-3551-3. Detail

  RŮŽIČKA, R. New Polymorphic NAND/XOR Gate. In Proceedings of 7th WSEAS International Conference on Applied Computer Science. WSEAS Applied Informatics & Communications. Computer Science Challenges. Venice: World Scientific and Engineering Academy, 2007. p. 192-196. ISBN: 978-960-6766-15-2. ISSN: 1790-5117. Detail

  RŮŽIČKA, R.; STAREČEK, L. Development of Building Blocks for Polymorphic Digital Circuits. In Proceedings of the Work in Progress Session of 10th Euromicro DSD 2007. Linz: Johannes Kepler University Linz, 2007. p. 33-34. ISBN: 978-3-902457-16-5. Detail

  RŮŽIČKA, R.; STRNADEL, J. Test Controller Synthesis Constrained by Circuit Testability Analysis. In Proceedings of 10th Euromicro Conference on Digital System Design, Architectures, Methods and Tools. Los Alamitos: IEEE Computer Society Press, 2007. p. 626-633. ISBN: 0-7695-2978-X. Detail

• 2006

  RŮŽIČKA, R. DFT Flow for RT Level Digital Circuits Using iFCoRT System. In Proceedings of the Seventh International Scientific Conference Electronic Computers and Informatics ECI 2006. Košice: 2006. p. 292-297. ISBN: 80-8073-598-0. Detail

  RŮŽIČKA, R.; SEKANINA, L. Evolutionary Circuit Design in REPOMO - Reconfigurable Polymorphic Module. In Proceedings of the Second IASTED International Conference on Computational Intelligence. Anaheim: ACTA Press, 2006. p. 237-241. ISBN: 0-88986-602-3. Detail

  ŠKARVADA, J.; RŮŽIČKA, R. Using Petri Nets for RT Level Digital Systems Test Scheduling. In Proceedings of 1st International Workshop on Formal Models (WFM'06). Ostrava: 2006. p. 79-86. ISBN: 80-86840-20-4. Detail

• 2005

  RŮŽIČKA, R. On the Petri Net Based Test Scheduling. In Proceedings of the Work in Progress Session at Euromicro SEAA/DSD 2005. Linz: Johannes Kepler University Linz, 2005. p. 18-19. ISBN: 3-902457-09-0. Detail

• 2004

  RŮŽIČKA, R., SEKANINA, L. A Platform for Demonstration of Analogue and Digital Circuits Evolution. In Proceedings of the Sixth Internation Scientific Conference Electronic Computers nad Informatics 2004. Košice: The University of Technology Košice, 2004. p. 158-163. ISBN: 80-8073-150-0. Detail

  RŮŽIČKA, R., ŠKARVADA, J. RTL Testability Verification System. In Proceedings of the Work In Progress Session of 30th Euromicro Conference. Linz: Johannes Kepler University Linz, 2004. p. 101-102. ISBN: 3-902457-05-8. Detail

  RŮŽIČKA, R., TUPEC, P. Formal Approach to Synthesis of a Test Controller. In Proceedings of Eleventh International Conference and Workshop on the Engineering of Computer-Based Systems. Los Alamitos, California: IEEE Computer Society, 2004. p. 348-355. ISBN: 0-7695-2125-8. Detail

• 2003

  RŮŽIČKA, R. Testable Design Verification Using Petri Nets. Proceedings of Euromicro Symposium on Digital System Design 2003. Los Alamitos, CA: IEEE Computer Society Press, 2003. p. 304-311. ISBN: 0-7695-2003-0. Detail

  RŮŽIČKA, R.; ZBOŘIL, F. Representation of Datapath Structure in Predicate Logic and its Implementation in Prolog. Proceedings of International Carpathian Control Conference. Košice: The University of Technology Košice, 2003. p. 727-730. ISBN: 80-7099-509-2. Detail

  SEKANINA, L.; RŮŽIČKA, R. Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. The 2003 NASA/DoD Conference on Evolvable Hardware. Los Alamitos: IEEE Computer Society Press, 2003. p. 135-144. ISBN: 0-7695-1977-6. Detail

  SEKANINA, L.; RŮŽIČKA, R. On the Automatic Design of Testable Circuits. Proceedings of IEEE Workshop on Design nad Diagnostics of Electronic Circuits and Systems. Poznań: Publishing House of Poznan University of Technology, 2003. p. 299-300. ISBN: 83-7143-557-6. Detail

• 2002

  RŮŽIČKA, R. The Formal Approach to the RTL Test Application Problem Using Petri Nets. Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems 2002. Brno: Faculty of Information Technology BUT, 2002. p. 78-86. ISBN: 80-214-2094-4. Detail

  RŮŽIČKA, R. VHDL Circuit Description Transparency Analysis. Proceedings of the Fifth International Scientific Conference Electronic Computers and Informatics 2002. Košice: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2002. p. 194-199. ISBN: 80-7099-879-2. Detail

• 2001

  KOTÁSEK, Z.; RŮŽIČKA, R.; STRNADEL, J. Formal and Analytical Approaches to the Testability Analysis - the Comparison. Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop 2001. Gyor: SZIF-UNIVERSITAS Ltd., Hungary, 2001. p. 123-128. ISBN: 963-7175-16-4. Detail

  KOTÁSEK, Z.; RŮŽIČKA, R.; STRNADEL, J.; ZBOŘIL, F. Two Level Testability System. Proceedings of the 35th Spring International Conference MOSIS'01. Ostrava: 2001. p. 433-440. ISBN: 80-85988-57-7. Detail

  KOTÁSEK, Z.; STRNADEL, J.; RŮŽIČKA, R.; HLAVIČKA, J. Interactive Tool for Behavioral Level Testability Analysis. Proceedings of the IEEE ETW 2001. Stockholm: 2001. p. 117-119. Detail