doc. Ing.
Richard Růžička
Ph.D., MBA
Vice-dean for MSc. Study
+420 54114 1208
vicedean-education@fit.vut.cz
ruzicka@fit.vut.cz
L333 Office
Projects
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2023
Application-specific HW/SW architectures and their applications, BUT, Vnitřní projekty VUT, FIT-S-23-8141, start: 2023-03-01, end: 2026-02-28, running
High Performance, Safe, Secure, Open-Source Leveraged RISC-V Domain-Specific Ecosystems, EU, HORIZON EUROPE, 9A23003, start: 2023-05-01, end: 2026-04-30, running
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2022
Transformace formy a obsahu vzdělávání na Vysokém učení technickém v Brně, MŠMT, Výzva pro VŠ v rámci NPO, start: 2022-04-01, end: 2024-12-31, running
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2021
FIT BUT - Preparation of own project for Horizon Europe program, JMK, Smart akcelerátor v Jihomoravském kraji II, start: 2021-05-01, end: 2021-12-31, running
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2020
Návrh, optimalizace a evaluace aplikačně specifických počítačových systémů, BUT, Vnitřní projekty VUT, FIT-S-20-6309, start: 2020-03-01, end: 2023-02-28, completed
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2018
Introduction of attractive and effective English language studies at FIT, OVZ, Ostatní veřejné zdroje financování nepatřící do institucionálních zdrojů ČR, start: 2018-02-01, end: 2019-08-31, running
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2017
Infrastructure for modern studium of IT, EU, OP VVV PO2 ERDF výzva pro vysoké školy, start: 2017-10-01, end: 2022-09-30, running
Moderní a otevřené studium techniky, EU, OP VVV PO2 ESF výzva pro vysoké školy, start: 2017-09-01, end: 2022-12-31, running
Pokročilé paralelní a vestavěné počítačové systémy, BUT, Vnitřní projekty VUT, FIT-S-17-3994, start: 2017-03-01, end: 2020-02-29, completed
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2016
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, start: 2016-01-01, end: 2020-12-31, completed
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2015
Innovation of the equipment for fabriacation of multilayer PCBs, BUT, Vnitřní projekty VUT, FEKT/FIT-J-15-2832, start: 2015-01-01, end: 2015-12-31, completed
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2014
Architektury paralelních a vestavěných počítačových systémů, BUT, Vnitřní projekty VUT, FIT-S-14-2297, start: 2014-01-01, end: 2016-12-31, completed
Unconventional Design Techniques for Intrinsic Reconfiguration of Digital Circuits: From Materials to Implementation, MŠMT, COST CZ (2011-2017), LD14055, start: 2014-05-05, end: 2017-05-31, completed
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2012
Multimedia lab for design of advanced integrated systems, MŠMT, Fond rozvoje vysokých škol (FRVŠ), FR1558/2012/Aa, start: 2012-01-01, end: 2012-12-31, completed
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2011
Advanced secured, reliable and adaptive IT, BUT, Vnitřní projekty VUT, FIT-S-11-1, start: 2011-01-01, end: 2013-12-31, completed
The IT4Innovations Centre of Excellence, MŠMT, Operační program Výzkum a vývoj pro inovace, ED1.1.00/02.0070, start: 2011-01-01, end: 2015-12-31, completed
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2010
Laboratory for design and prototyping of an advanced electronic systems, MŠMT, Fond rozvoje vysokých škol (FRVŠ), FR2789/2010/Aa, start: 2010-01-12, end: 2010-12-31, completed
Natural Computing on Unconventional Platforms, GACR, Standardní projekty, GAP103/10/1517, start: 2010-01-01, end: 2013-12-31, running
Secured, reliable and adaptive computer systems, BUT, Vnitřní projekty VUT, FIT-S-10-1, start: 2010-03-01, end: 2010-12-31, completed
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2007
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
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2006
IT Professionals - Graduates Competitiveness Increase for European Labour Market, CZ.04.1.03/3.2.15.1/0003, start: 2006-01-01, end: 2007-12-31, completed
Methods of polymorphic digital circuit design, GACR, Standardní projekty, GA102/06/0599, start: 2006-01-01, end: 2008-12-31, completed
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2005
Integrated approach to education of PhD students in the area of parallel and distributed systems, GACR, Doktorské granty, GD102/05/H050, start: 2005-01-01, end: 2008-12-31, completed
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2004
Compound Laboratory for Computer Hardware Teaching, FR1687/2004/A, start: 2004-01-01, end: 2004-12-31, completed
Modern Methods of Digital Systems Design, GACR, Standardní projekty, GA102/04/0737, start: 2004-01-01, end: 2006-12-31, completed
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2003
Formal approach to digital circuits test scheduling, GACR, Postdoktorandské granty, GP102/03/P176, start: 2003-01-01, end: 2005-12-31, completed
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2001
Formal Approaches in Digital Design Diagnostics - Testable Design Verification, GACR, Standardní projekty, GA102/01/1531, start: 2001-01-01, end: 2003-12-31, completed