Václav Dvořák

Publications

• 2015

  DVOŘÁK, V.; MIKUŠEK, P. Memory-Based Logic Control for Embedded Systems. Lecture notes in Electrical Engineering, 2015, vol. 325, no. 1, p. 367-379. ISSN: 1876-1100. Detail

• 2014

  HRBÁČEK, R.; DVOŘÁK, V. Bent Function Synthesis by Means of Cartesian Genetic Programming. In Parallel Problem Solving from Nature - PPSN XIII. Heidelberg: Springer Verlag, 2014. p. 414-423. ISBN: 978-3-319-10761-5. Detail

• 2013

  DVOŘÁK, V.; MIKUŠEK, P. Easily Reprogrammable Embedded Logic Control. Proceedings of ICINCO 2013, Vol.1. Lisbon: SciTePress - Science and Technology Publications, 2013. p. 471-476. ISBN: 978-989-8565-70-9. Detail

• 2012

  DVOŘÁK, V. Branching Program-Based Programmable Logic for Embedded Systems. Proceedings of ICONS 2012. New York: International Academy, Research, and Industry Association, 2012. p. 109-115. ISBN: 978-1-61208-184-7. Detail

  DVOŘÁK, V. O složitosti a optimalizaci větvících programů pro stroje DDM. Programmable Devices and Embedded Systems PDeS 2012. Programmable devices and systems. Brno: Faculty of Electrical Engineering and Communication BUT, 2012. s. 84-89. ISBN: 978-3-902823-21-2. ISSN: 1474-6670. Detail

• 2011

  DVOŘÁK, V.; JAROŠ, J. A Programmable Interconnection Network for Multiple Communication Patterns. Proceedings of the Sixth International Conference on Systems, ICONS 2011. St. Maarten: International Academy, Research, and Industry Association, 2011. p. 6-11. ISBN: 978-1-61208-002-4. Detail

  DVOŘÁK, V.; MIKUŠEK, P. On the cascade realization of sparse logic functions. Euromicro Proceedings. Oulu: IEEE Computer Society, 2011. p. 21-28. ISBN: 978-0-7695-4494-6. Detail

  JAROŠ, J.; DVOŘÁK, V. Optimizing Collective Communications on the K-port Spidergon Network. Proceedings of the Sixth International Conference on Systems, ICONS 2011. St. Maarten: International Academy, Research, and Industry Association, 2011. p. 24-29. ISBN: 978-1-61208-002-4. Detail

  JAROŠ, J.; DVOŘÁK, V. Evolutionary Design of Collective Communications on Wormhole NoCs. In Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification. Embedded Multi-Core Systems. London: CRC Press LLC, 2011. p. 60-94. ISBN: 978-1-4398-2911-0. Detail

  MIKUŠEK, P.; TOMEC, M.; DVOŘÁK, V. A Cascade Decomposition of Application-Specific Systems. MEMICS Proc. Brno: Brno University of Technology, 2011. p. 78-85. ISBN: 978-80-214-4305-1. Detail

• 2010

  DVOŘÁK, V. Multi-Terminal BDDs in Microprocessor-Based Control. Proceedings ICINCO 2010. Funchal, Madeira: Institute for Systems and Technologies of Information, Control and Communication, 2010. p. 140-145. ISBN: 978-989-8425-02-7. Detail

  DVOŘÁK, V.; JAROŠ, J. Optimizing Collective Communications on 2D-Mesh and Fat Tree NoC. In 9th International Conference on Networks, ICN 2010. Piscataway, NJ: IEEE Computer Society, 2010. p. 22-27. ISBN: 978-0-7695-3979-9. Detail

  DVOŘÁK, V.; MIKUŠEK, P. Design of Arbiters and Allocators Based on Multi-Terminal BDDs. Journal of Universal Computer Science, 2010, vol. 16, no. 14, p. 1826-1852. ISSN: 0948-6968. Detail

  JAROŠ, J.; DVOŘÁK, V. Evolutionary-Based Conflict-Free Scheduling of Collective Communications on Spidergon NoCs. In Proceedings of the 12th Annual Genetic and Evolutionary Computation Conference, GECCO '10. New York: Association for Computing Machinery, 2010. p. 1171-1178. ISBN: 978-1-4503-0072-8. Detail

• 2009

  DVOŘÁK, V.; MIKUŠEK, P. Optimalizace firmware pro vestavěné logcké řízení. Programmable devices and systems, 2009, roč. 2009, č. 1, s. 109-114. ISSN: 1474-6670. Detail

  MIKUŠEK, P.; DVOŘÁK, V. Heuristic Synthesis of MTBDDs Based On Local Width Minimization. 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Znojmo: Masaryk University, 2009. p. 235-235. ISBN: 978-80-87342-04-6. Detail

  MIKUŠEK, P.; DVOŘÁK, V. Heuristic Synthesis of Multi-Terminal BDDs Based on Local Width/Cost Minimization. 12th EUROMICRO Conference on Digital System Design DSD 2009. Patras: IEEE Computer Society, 2009. p. 605-608. ISBN: 978-0-7695-3782-5. Detail

• 2008

  DVOŘÁK, V. Communication Performance of Mesh- and Ring-Based NoCs. Proceedings of the 7th Int. Conference on Networking. New York: IEEE Computer Society, 2008. p. 156-161. ISBN: 978-0-7695-3106-9. Detail

  DVOŘÁK, V. Embedded Firmware Development with Multi-Way Branching. Proc. of the 3rd Int. Coference on Systems. New York: IEEE Computer Society, 2008. p. 317-322. ISBN: 978-0-7695-3105-2. Detail

  DVOŘÁK, V. Implementation of Combinational and Sequential Functions in Embedded Firmware. International Journal of Software Engineering and Its Applications, 2008, vol. 2, no. 1, p. 43-54. ISSN: 1738-9984. Detail

  DVOŘÁK, V.; MIKUŠEK, P. LUT Cascade-Based Implementations of Allocators. Proc. of the 25th Convention of EEE in Israel. New York: IEEE Computer Society, 2008. p. 85-89. ISBN: 978-1-4244-2482-5. Detail

  JAROŠ, J.; DVOŘÁK, V. An Evolutionary Design Technique for Collective Communications on Optimal Diameter-Degree Networks. In 2008 Genetic and Evolutionary Computational Conference GECCO. New York: Association for Computing Machinery, 2008. p. 1539-1546. ISBN: 978-1-60558-131-6. Detail

  MIKUŠEK, P.; DVOŘÁK, V. On Lookup Table Cascade-Based Realizations of Arbiters. 11th EUROMICRO Conference on Digital System Design DSD 2008. Parma: IEEE Computer Society, 2008. p. 795-802. ISBN: 978-0-7695-3277-6. Detail

  MIKUŠEK, P.; DVOŘÁK, V. On Lookup Table Cascade-Based Realizations of Arbiters. 4th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Znojmo: Masaryk University, 2008. p. 261-261. ISBN: 978-80-7355-082-0. Detail

• 2007

  DVOŘÁK, V. Implementation of Combinational and Sequential Functions in Embedded Firmware. Proceedings of the 2007 International Conference on Intelligent Pervasive Computing (IPC-07). Los Alamitos, California: IEEE Computer Society, 2007. p. 80-85. ISBN: 978-0-7695-3006-2. Detail

  DVOŘÁK, V. Space-Time Trade-offs in SW Evaluation of Boolean Functions. Proceedings of The Second International Conference on Systems. New York: IEEE Computer Society, 2007. p. 344-349. ISBN: 0-7695-2807-4. Detail

  DVOŘÁK, V. Time- and Space-Efficient Evaluation of Sparse Boolean Functions in Embedded Software. Proceedings of 14th Annual IEEE International Conference and Workshops on the Engineering of Computer-Based Systems. Los Alamitos: IEEE Computer Society, 2007. p. 178-185. ISBN: 0-7695-2772-8. Detail

  DVOŘÁK, V. Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware. Journal of Software, 2007, vol. 2, no. 5, p. 52-63. ISSN: 1796-217X. Detail

  DVOŘÁK, V.; JAROŠ, J.; OHLÍDAL, M. Optimum Topology-Aware Scheduling of Collective Communications. In Proceedings of The Sixth International Conference on Networking. New York: IEEE Computer Society, 2007. p. 1-6. ISBN: 0-7695-2805-8. Detail

  SLANÝ, K.; DVOŘÁK, V. Evolutionary Designed Branch Predictors. 13th International Conference on Soft Computing. Brno: Faculty of Mechanical Engineering BUT, 2007. p. 18-23. ISBN: 978-80-214-3473-8. Detail

• 2006

  JAROŠ, J.; DVOŘÁK, V. Evolutionary Design of OAB and AAB Communication Schedules for Networking Systems on Chips. In MEMICS 2006 Second Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Mikulov: Masaryk University, 2006. p. 63-68. ISBN: 80-214-3287-X. Detail

  JAROŠ, J.; DVOŘÁK, V. Evolutionary Design of OAB and AAB Communication Schedules for Networking Systems on Chips. In Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Praha: IEEE Computer Society, 2006. p. 222-223. ISBN: 1-4244-0184-4. Detail

  JAROŠ, J.; OHLÍDAL, M.; DVOŘÁK, V. Complexity of Collective Communications on NoCs. In Proc. of 5th International Symposium on Parallel Computing in Electrical Engineering. Los Alamitos, CA 90720-1314: IEEE Computer Society, 2006. p. 127-132. ISBN: 0-7695-2554-7. Detail

  OHLÍDAL, M.; JAROŠ, J.; DVOŘÁK, V. Performance of Collective Communications on Interconnection Networks with Fat Nodes and Edges. In Proceedings of the Fifth International Conference on Networking ICN 2006. Los Alamitos: IEEE Computer Society, 2006. p. 619-624. ISBN: 0-7695-2570-9. Detail

  OHLÍDAL, M.; JAROŠ, J.; DVOŘÁK, V.; SCHWARZ, J. Evolutionary Design of OAB and AAB Communication Schedules for Interconnection Networks. In EvoStar 2006. Lecture Notes in Computer Science. Berlin: Springer Verlag, 2006. p. 267-278. ISBN: 978-3-540-33237-4. Detail

• 2005

  DVOŘÁK, V. Reconfigurability of the Interconnect Architecture for Chip Multiprocessors. Proceedigns of the 4th International Symposium on Information and Communication Technologies. ACM International Conference Proceedings Series. Dublin: Computer Science Press, 2005. p. 136-141. ISBN: 0-9544145-6-X. Detail

  DVOŘÁK, V. Scheduling Collective Communications on Wormhole Fat Cubes. Proc. of the 17th International Symposium on Computer Architecture and High Performance Computing. Los Alamitos: IEEE Computer Society, 2005. p. 27-34. ISBN: 0-7695-2446-X. Detail

  JAROŠ, J.; DVOŘÁK, V. Speeding-up OAS and AAS Communication in Networking System on Chips. Proc. of 8th IEEE Workshop on Design and Diagnostic of Electronic Circuits and Systems. Sopron: University of West Hungary, 2005. p. 206-209. ISBN: 9639364487. Detail

  JAROŠ, J.; OHLÍDAL, M.; DVOŘÁK, V. Evolutionary Design of Group Communication Schedules for Interconnection Networks. In Proceedings of the 20th International Symposium Computer and Information Sciences - ISCIS 2005. Lecture Notes in Computer Science. Berlin: Springer Verlag, 2005. p. 472-481. ISBN: 978-3-540-29414-6. Detail

  KUTÁLEK, V.; DVOŘÁK, V. On Complexity of Collective Communications on a Fat Cube Topology. Journal of Universal Computer Science, 2005, vol. 11, no. 6, p. 944-961. ISSN: 0948-6968. Detail

• 2004

  DVOŘÁK, V. Architektury a programování paralelních systémů. Brno: Nakladatelství Vysokého učení technického v Brně VUTIUM, 2004. s. 0-0. ISBN: 80-214-2608-X. Detail

  DVOŘÁK, V. Formal Specifications of an Extended Phase-Parallel Model of Stream Processing. Proc. of Joint Workshop on Formal Specifications of Computer-Based Systems. Stirling: University of Stirling, 2004. p. 37-44. ISBN: 1-85769-1970. Detail

  DVOŘÁK, V. Optimizing Communication Architectures for Parallel Embedded Systems. In Design of Embedded Control Systems. Berlin: Springer Verlag, 2004. p. 225-234. ISBN: 0-387-23630-9. Detail

  DVOŘÁK, V.; ŠVÉDA, M. Proceedings of the International IEEE Conference and Workshop ECBS'2004. Los Alamitos, CA: IEEE Computer Society, 2004. p. 0-0. ISBN: 0-7695-2125-8. Detail

  DVOŘÁK, V.; ŠVÉDA, M.; RATTRAY, C.; ROZENBLIT, J. Formal Specifications of Computer-Based Systems - J.UCS Special Issue. Journal of Universal Computer Science, 2004, vol. 9, no. 11, p. 1258-1260. ISSN: 0948-6968. Detail

  STAROBA, J.; DVOŘÁK, V. Design of Low-Cost Communication Algorithms for Irregular Networks. Proceedings of the 3rd International Conference on Networking ICN '04. Colmar: University of Haute Alsace, 2004. p. 980-985. ISBN: 0-86341-325-0. Detail

• 2003

  DVOŘÁK, V. Communication Architectures for Application-Specific Multiprocessor Systems (on a Chip). Proc. of the 11th International Conference on Software, Telecommunications and Computer Networks SoftCOM 2003. Split: Faculty of Electrical Engineering, Mechanical Engineering and Naval Architecture, 2003. p. 778-782. ISBN: 953-6114-64-X. Detail

  DVOŘÁK, V.; KUTÁLEK, V. A Methodology for Designing Communication Architectures for Multiprocessor SoCs. Proceedings EUROMICRO Symposium on Digital System Design - Architectures, Methods and Tools DSD 2003. Belek: IEEE Computer Society, 2003. p. 455-458. ISBN: 0-7695-2003-0. Detail

  DVOŘÁK, V.; STAROBA, J. Genetic Search for the Shortest Group Communications on Irregular Topologies. Proceedings of XXVth International Autumn Colloquium ASIS 2003. Ostrava: 2003. p. 321-326. ISBN: 80-85988-88-7. Detail

  KUTÁLEK, V.; DVOŘÁK, V. A multi-protocol cache controller. IFAC Workshop on Programmable devices and systems - PDS 2003. Ostrava: VŠB - Technical University of Ostrava, 2003. p. 220-225. ISBN: 0-08-044130-0. Detail

  KUTÁLEK, V.; DVOŘÁK, V. Tuning Parallel Performance of Global Image Processing Operators. Proceedings of 37th International Conference MOSIS´03 Modelling and Simulation of Systems. Ostrava: 2003. p. 57-64. ISBN: 80-85988-86-0. Detail

  STAROBA, J.; DVOŘÁK, V. Genetic Algorithm Optimization of Group Communications. 9th International Conference on Soft Computing Mendel 2003. Brno: Faculty of Mechanical Engineering BUT, 2003. p. 47-52. ISBN: 80-214-2411-7. Detail

• 2002

  ČEJKA, R.; DVOŘÁK, V.; STAROBA, J. Predicting performance of SMP clusters. In Distributed and Parallel Systems - Cluster and Grid Computing. Boston/London: Kluwer Academic Publishers, 2002. p. 38-45. ISBN: 1-4020-7209-0. Detail

  DVOŘÁK, V. Architektura a programování paralelních systémů. Učební texty pro předmět APP, obor IT. Brno: 2002. s. 0-0. Detail

  DVOŘÁK, V. Executable System-Level Specifications of HW/SW Architecture for Embedded Multiprocessor Systems. Proceedings of the Joint Workshop on Formal Specifications of Computer-Based Systems, 2002. Stirling: University of Stirling, 2002. p. 65-70. ISBN: 1-85769-169-5. Detail

  DVOŘÁK, V. Simulation and Prototyping in Teaching Parallel Architectures, Algorithms, and Programming Models. Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications. Volume II. Las Vegas, Nevada: Computer Science Research, Education, and Applications Press, 2002. p. 934-940. ISBN: 1-892512-88-2. Detail

  DVOŘÁK, V.; STAROBA, J. Design Space Exploration of Parallel Embedded Applications Based on Performance-Oriented Specifications. Proceedings of the Joint Workshop on Formal Specifications of Computer-Based Systems. Stirling: University of Stirling, 2002. p. 71-75. ISBN: 1-85769-169-5. Detail

  DVOŘÁK, V.; STAROBA, J. Performance Prediction Model of Bus-Based Shared Memory Architectures. Proceedings of 36th International Conference MOSIS'02 Modelling and Simulation of Systems. Vol. I. Ostrava: 2002. p. 273-280. ISBN: 80-85988-71-2. Detail

  KUTÁLEK, V.; DVOŘÁK, V. Prototyping Parallel Applications Based on Divide and Conquer Strategy. Proceedings of 36th International Conference MOSIS '02 Modelling and Simulation of Systems. Vol. I. Ostrava: 2002. p. 313-320. ISBN: 80-85988-71-2. Detail

  KUTÁLEK, V.; DVOŘÁK, V. Simulation and Prototyping Multiprocessor SoC with Hybrid Pipeline/Farm Architecture. Proceedings of IEEE Design and Diagnostics of Electronic Circuits and System Workshop. Brno: Faculty of Information Technology BUT, 2002. p. 296-299. ISBN: 80-214-2094-4. Detail

  STAROBA, J.; DVOŘÁK, V. Parallel Linear Equations Solvers for Scientific Simulation: Cluster and SMP Experience. Proceedings of XXIVth International Autumn Colloquium ASIS'02 Advanced Simulation of Systems. Ostrava: 2002. p. 225-230. ISBN: 80-85988-77-1. Detail

• 2001

  ČEJKA, R.; DVOŘÁK, V. Evaluating Performance of Message-Passing Programs on SMP Clusters. Proceedings of the 35th Spring International Conference Modelling and Simulation of Systems MOSIS 2001. Hradec nad Moravicí: 2001. p. 115-120. ISBN: 80-85988-57-7. Detail

  DVOŘÁK, V. Optimizing SW/HW Architecture for Parallel Embedded Systems - A Case Study. Proceedings of the the International Workshop on Discrete-Event System Design, DESDes'01. Przytok near Zielona Gora, POLAND: Publishing House of Zielona Gora Technical University, 2001. p. 103-108. ISBN: 83-85911-62-6. Detail

  DVOŘÁK, V.; ČÁBEL, M. Can Message Passing Architecture Outperform EREW PRAM?. In Proceedings of the 35th Spring International Conference Modelling and Simulation of Systems MOSIS 2001. Hradec nad Moravicí: 2001. p. 109-114. ISBN: 80-85988-57-7. Detail

  DVOŘÁK, V.; STAROBA, J. Numerical Performance Models of Synchronization Operations in Shared-Variable Programs. Proceedings of XXIII Int. Autumn Colloquium ASIS 2001. Ostrava: 2001. p. 65-70. ISBN: 80-85988-61-5. Detail

  DVOŘÁK, V.; STAROBA, J. Simulating PRAM algorithms with TRANSIM. Proceedings of the 35th Spring International Conference Modelling and Simulation of Systems MOSIS 2001. Hradec nad Moravicí: 2001. p. 81-86. ISBN: 80-85988-57-7. Detail

  SEKANINA, L.; DVOŘÁK, V. A Totally Distributed Genetic Algorithm: From a Cellular System to the Mesh of Processors. Modelling and Simulation 2001. Prague: Faculty of Electrical Engineering, Czech Technical University, 2001. p. 539-543. ISBN: 1-56555-225-3. Detail

  STAROBA, J.; DVOŘÁK, V. Simulation-based performance tuning of a parallel bitonic sort algorihtm. Proceedings of 7th Conference Student FEI 2001. Brno: Brno University of Technology, 2001. p. 358-362. ISBN: 80-214-1860-5. Detail

• 2000

  ČEJKA, R.; DVOŘÁK, V. CSP-based Modeling of Emerging Scalable Parallel Computers. Proceedings of the 34th Spring International Conference Modelling and Simulation of Systems MOSIS 2000, Vol. 1. Rožnov pod Radhoštěm: 2000. p. 135-142. ISBN: 80-85988-44-5. Detail

  DVOŘÁK, V. Formal Specifications of Computer-Based Systems. 2000, vol. 6, no. 11, p. 1-3. Detail

  DVOŘÁK, V.; ČEJKA, R. A Choice of SM/DM Parallel ANN Implementation for Embedded Applications. Proceedings of the 7th IEEE International Conference on ECBS. Edinburgh, Scotland: IEEE Computer Society Press, 2000. p. 18-23. ISBN: 0-7695-604-6. Detail

  DVOŘÁK, V.; ČEJKA, R. Prototyping cluster-based distributed applications. In Distributed and Parallel Systems - From Instruction Parallelism to Cluster Computing. The Kluwer International Series in Engineering and Computer Science. Boston: Kluwer Academic Publishers, 2000. p. 229-232. ISBN: 0-7923-7892-X. Detail

  DVOŘÁK, V.; MARKOVIČ, L. High Performance Computing in JAVA -- Fact or Fiction?. FIMU-RS-2000-11. unknown, 2000. p. 0-0. Detail

  DVOŘÁK, V.; SKALICKÝ, J. Faculty of Electrical Engineering and Computer Science - Information booklet 2000-2001. Application Software Brno, ltd., 2000. p. 0-0. Detail

• 1999

  ČEJKA, R.; DVOŘÁK, V. CSP-based Modeling of SM Architectures. Proceedings of conference Computer Engineering and Informatics CE&I'99. Kosice - Herlany: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 1999. p. 163-168. ISBN: 80-88922-05-4. Detail

  DVOŘÁK, V.; ČEJKA, R. Performance Prediction of Cluster Computing. Proceedings of the International Workshop Modelling and Simulation in Management, Informatics and Control MOSMIC'99. Sulov: Zilina University Publisher, 1999. p. 229-233. ISBN: 80-7100-635-1. Detail

  DVOŘÁK, V.; ČEJKA, R. The CSP-Based Simulation of Interconnection Networks and Routing Algorithms. Proceedings of the 33rd Spring International Conference Modelling and Simulation of Systems MOSIS'99, Vol. 2. Rožnov pod Radhoštěm: 1999. p. 43-50. ISBN: 80-85988-33-X. Detail

  DVOŘÁK, V.; DRÁBEK, V. Architektura procesorů. Brno: 1999. 300 s. ISBN: 80-214-1458-8. Detail

  DVOŘÁK, V.; MATOUŠEK, P. Highly Efficient Parallel ANN Implementation for Real-Time Processing. Proceedings of conference Computer Engineering and Informatics CE&I'99. Kosice - Herlany, Slovakia: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 1999. p. 186-191. ISBN: 80-88922-05-4. Detail

• 1998

  DVOŘÁK, V. Faculty of Electrical Engineering and Computer Science - Information booklet 1998-2000. Brno: Application Software Brno, ltd., 1998. p. 0-0. Detail

  DVOŘÁK, V.; SLLAME, A. An FPGA-Based Systolic Serial Multiplier. Proceedings of the 5th Electronic Devices and Systems Conference 1998. Brno: unknown, 1998. p. 394-397. ISBN: 80-214-1198-8. Detail

  DVOŘÁK, V.; SLLAME, A. CSP-based modeling and simulation in computer architecture courses. Proceedings of the 9th International Symposium on Systems-Modeling-Control SMC' 98. Zakopane: unknown, 1998. p. 1-6. ISBN: 83-909161-0-X. Detail

  ŠVÉDA, M.; DVOŘÁK, V.; HRUŠKA, T.; DRÁBEK, V. ECBS Master Degree Study at the Technical University of Brno. Proceedings of the IEEE Conference and Workshop ECBS'98. Los Alamitos, California: IEEE Computer Society Press, 1998. p. 306-312. ISBN: 0-8186-8463-1. Detail

• 1997

  DVOŘÁK, V. Advanced Computer Architecture. CZ: neznámá, 1997. s. 0-0. Detail

  DVOŘÁK, V. Evaluating embedded parallel applications in TRANSIM. Proceedings of the 3rd International Conference MENDEL' 97. Brno: unknown, 1997. p. 44-49. ISBN: 80-214-0884-7. Detail

  DVOŘÁK, V. Bounds on the Sizes of Decision Diagrams. 1997, vol. 3, no. 1, p. 2-22. Detail

• 1996

  DVOŘÁK, V. Construction of optimum OBDDs using parallel genetic approach. Proceedings of the 2nd International Conference MENDEL' 96. Brno: unknown, 1996. p. 221-222. ISBN: 80-214-0769-7. Detail

  DVOŘÁK, V. Parallel implementation of ANN for Embedded Applications. Proceedings WORKSHOP'96. Praha: Faculty of Electrical Engineering, Czech Technical University, 1996. p. 221-222. Detail

  DVOŘÁK, V. Performance analysis of parallel/distributed genetic algorithms. Proc. of the 1st Austrian-Hungarian Workshop on Distributed and Parallel Systems DAPSYS'96. Miskolc: 1996. p. 219-220. ISBN: ?. Detail

  DVOŘÁK, V. Prototyping parallel ANN implementations with TRANSIM. HPCS' 96 Conference Proceedings. Ottawa: unknown, 1996. p. 1-16. ISBN: 0-88629-301-4. Detail

  DVOŘÁK, V.; EYSSELT, M. Ústav a studijní obor Informatika a výpočetní technika, šk.r. 1996/97. Brno: Ústav informatiky a výpočetní techniky FEI VUT, 1996. s. 0-0. Detail

  SCHWARZ, J.; DVOŘÁK, V.; BUREŠ, P. Číslicové a impulsové obvody. Brno: Vysoké učení technické v Brně, 1996. s. 1-102. ISBN: 80-214-0622-4. Detail

• 1995

  DVOŘÁK, V. Decomposition techniques for look-up table based FPGA design. Proc. of the Workshop on Design Methodologies for Microelectronics. Smolenice: Slovak Academy of Science, 1995. p. 249-250. Detail

  DVOŘÁK, V. Logic decomposition into LUT/MUX-based logic blocks. Proceedings of the 7th School VLSI and ASIC Design. Baligrod-Bystre: unknown, 1995. p. 37-56. ISBN: 83-900859-3-3. Detail

  DVOŘÁK, V. Performance prediction of GA on transputer arrays. Proceedings of the 1st International Conference MENDEL' 95. Brno: unknown, 1995. p. 35-40. ISBN: 80-214-0769-7. Detail

  DVOŘÁK, V.; EYSSELT, M. INFORMATIKA A VÝPOČETNÍ TECHNIKA, školní rok 1995/96 (INFORMACE O ÚSTAVU A STUDIJNÍM OBORU). Brno: Ústav informatiky a výpočetní techniky FEI VUT, 1995. s. 0-0. Detail

  DVOŘÁK, V.; KUNOVSKÝ, J.; SCHWARZ, J.; ZBOŘIL, F. Problem Solving with Parallel Processing. Proceedings of the Workshop'95. Praha: 1995. p. 215-216. Detail

  DVOŘÁK, V.; SLÁDEČEK, L. Performance Evaluation of Transputer-Based Parallel Implementation of CNN. Proc. of 1995 AMSE Int. Symposium on Fuzzy systems, Neural Networks, and Artificial Intelligence. Brno: 1995. p. 11-18. ISBN: 80-214-0657-7. Detail

  DVOŘÁK, V.; ŠUSTR, J. A synthesis of suboptimal decision diagrams. Computer and Artificial Intelligence, 1995, vol. 14, no. 1, p. 93-103. ISSN: 0232-0274. Detail

• 1994

  DOS SANTOS, L.; DVOŘÁK, V.; CHALMERS, A. Problem Solving with Parallel Processing. Bristol: unknown, 1994. p. 0-0. Detail

  DVOŘÁK, V. Concurrent algorithms for message passing parallel architectures. Problem Solving with Parallel Processing. Cesme: 1994. p. 1-28. Detail

  DVOŘÁK, V. Multi-transputer implementations of ANN - a case study. Sedmihorky: 1994. p. 239-244. Detail

• 1993

  DVOŘÁK, V. Comparison of optimal and suboptimal synthesis of ordered binary decision diagrams. 1993, roč. 3, č. 1, s. 373-381. Detail

  DVOŘÁK, V. Transputer Networks in Control. EC Newsletter, 1993, vol. Vol.5, no. No. 2, M, p. 7-24. ISSN: 1120-7221. Detail

• 1992

  DVOŘÁK, V. An optimization technique for ordered (binary) decision diagrams. Proceedings of the 6th Annual European Computer Conference CompEuro' 92. Hague: unknown, 1992. p. 1-4. ISBN: 0-8186-2760. Detail

  DVOŘÁK, V. Easily- and self-testable chip, board, and system architectures. EC Newsletter, 1992, vol. Vol. 4, no. No.1, p. 227-243. ISSN: 1120-7221. Detail

  DVOŘÁK, V.; ŠUSTR, J. Digital system synthesis on FPGAs. Proceedings of Mikrosystem' 92. Bratislava: unknown, 1992. p. 100-103. ISBN: 80-233-0255-8. Detail

• 1991

  DVOŘÁK, V. Automatic generation of decision diagrams for multiple-output logic functions. Sklarska Poreba: 1991. p. 33-36. ISBN: ?. Detail

  DVOŘÁK, V. CAD tools for VLSI. Bari: 1991. p. 0-0. Detail

• 1990

  DVOŘÁK, V. A cascade implementation of digital systems. Microprocessing and Microprogramming (North-Holland), 1990, roč. 29, č. 1, s. 151-163. ISSN: 0165-6074. Detail

  DVOŘÁK, V. Microsequencer architecture supporting arbitrary branching up to 2^m targets. 1990, roč. 1990, č. 3, s. 9-16. Detail